Both threading and misfit dislocations in partially relaxed InGaAs/GaAs heterostructures with a small lattice-mismatch have been investigated by means of chemical etching and atomic force microscopy (AFM). An anisotropic etching in HF-H 2 SO 4 -H 2 O 2 based aqueous solution was successfully used to determine the polarity of the crystallographic surfaces and an ultrasonic-vibration aided etching in CrO 3 -HF-H 2 O based solution was employed to reveal threading dislocations on the heterostructure surfaces. AFM measurements of surface morphology of the structures revealed a well-resolved cross-hatch pattern, which reproduced the network of underlying misfit dislocations, and, in addition, the outcrops of threading dislocations on the surface in a form of characteristic craters. Analysis of the results allowed drawing a conclusion on the mechanism of misfit strain relaxation in the investigated heterostructures.1 Introduction Lattice-mismatched GaAs-based heterostructures are of current interest because of their application in high-speed and optoelectronic devices. Epitaxial growth of those heterostructures is accompanied by a strain in the epitaxial layer that results from a difference in lattice parameters between the substrate and the layer. If the epitaxial layer is thin enough, the lattice misfit can be accommodated by elastic strain of the layer. However, when the layer thickness exceeds a critical value, misfit dislocations are generated at the interface to relieve some of the strain. In heteroepitaxial semiconductor systems with zinc-blende structure and a small lattice mismatch, grown on (001)-oriented substrates, orthogonal arrays of 60° misfit dislocations lying along two different 〈110〉 crystallographic directions are formed at the interface. The misfit dislocations are associated with threading dislocations which propagate through the epitaxial layer up to the surface.Dislocations play an important role in the technology of semiconductor materials and devices owing to their influence, mostly detrimental, on various electronic and mechanical processes. Current requirements for device miniaturization make the influence of dislocations on their performance and reliability increasingly important. Moreover, ideas of taking an advantage of specific electronic properties of dislocations in designing new electronic devices have been proposed; cf. [1]. To those ideas belongs the use of single misfit dislocations as a source and drain in a very short-channel field-effect transistor. More recently, dislocations have been utilized for the fabrication of silicon-based light-emitting diodes compatible with ultra-large-scale integration (ULSI) technology [2]. In those diodes a local strain field of intentionally introduced dislocation loops, which modifies the semiconductor band structure, provides spatial confinement of charge carriers and drastically improves the room-temperature efficiency of electroluminescence of the diodes.