Selectivity and sensitivity enhancement methods for high‐data‐rate super‐regenerative receiver

Abstract

This paper describes selectivity and sensitivity performance evaluations and improvement methods for an on-off keying super-regenerative (SR) receiver. A slope-controlled quasi-exponential quench waveform, generated by a low-complexity PVT-tolerant quench generator circuit, is proposed to increase data rate and reduce the receiver 3-dB bandwidth, thereby preventing oscillation caused by out-of-band injected signals and improving the receiver selectivity. The SR receiver sensitivity is also enhanced by a noise-canceling front-end topology with single-ended to differential (S2D) signal converter. To exemplify these techniques, we designed an SR receiver with the proposed front-end and quench waveform generator in a 0.18-μm CMOS technology. Theoretical analyses and circuit simulations show 30% and 65% reduction in 3-dB bandwidth of the SR receiver at 25 Mbps data rate by employing the proposed quench signal compared with piecewise-linear and trapezoidal quench waveforms, respectively. Performance of the proposed front-end is evaluated by a fast bit-error-rate estimation procedure, based on circuit noise simulations and statistical analyses, without the need for time-consuming transient-noise simulations. Accuracy of the procedure has been verified by comparing its results with transient-noise simulations. According to the estimated bit-error-rate curves, the noise-canceling topology with S2D converter enhances the SR receiver sensitivity by 9 dB.The noise-canceling RF front-end with S2D conversion is shown in Figure 7. A common gate (CG)common source (CS) LNA topology is employed to provide input impedance matching and S2D conversion. Trans-conductance of the CG transistor, M 3 , is set to 20 mS for 50-Ω input impedance matching. The biasing circuit in Figure 2 is also employed in the LNA to reduce the effect of PVT variations on trans-conductance of M 3 and M 4 . Phase difference between the two signals injected by the CS transistor, M 4 , and the CG transistor, M 3 , to the SR oscillator core is about 180 degrees. The Figure 6. (a) The conductance curve, G(t); (b) the sensitivity pulse, s(t), and the normalized oscillation envelope, p(t); and (c) the super-regenerative band-pass function, |H bp (ω)|, of the proposed quench technique for three different values of G À and gain. Data rate is 25 Mbps in all cases.Figure 8. The super-regenerative oscillator output employing (a) the proposed S2D converter and (b) a single-ended LNA. (c) Histogram of the oscillator output low level, derived from Monte Carlo simulations.Figure 14. Transient-noise simulation of the super-regenerative receiver at 25 Mbps data rate: (a) the input pulse, (b) oscillator differential output, (c) envelope detector output, and (d) output signals of the comparator and the flip-flop.

A fully digital open‐loop clock and data synchronizer for ultra‐low power super‐regenerative receivers

“…However, they mainly suffer from a low channel selectivity especially at higher operating frequencies mostly due to the insufficient quality factor of the resonators. The lower selectivity also makes the receiver more susceptible to noise and in‐band interference 2 thus affecting the overall sensitivity.…”