2008
DOI: 10.1016/j.sse.2008.06.006
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Self-aligned inversion n-channel In0.2Ga0.8As/GaAs metal–oxide–semiconductor field-effect-transistors with TiN gate and Ga2O3(Gd2O3) dielectric

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Cited by 18 publications
(14 citation statements)
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References 25 publications
(26 reference statements)
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“…These goals strongly inspire the research on group III-V semiconductors for MOS channels integrated with high-k dielectrics. Recently, after over 30 years of research, a significant progress in characteristics of n-MOSFET with GaAs and InGaAs surface channels has been achieved using GaGdO high-k oxide [1,2], atomic layer deposited Al 2 O 3 [3], amorphous Si and Ge passivation layers [4,5]. To maintain high electron mobility in InGaAs/InP channel, it has to be separated from high-k oxide by a thin barrier layer, In 0.52 Al 0.48 As being the most desirable candidate due to its large conduction band offset with InGaAs.…”
Section: Introductionmentioning
confidence: 99%
“…These goals strongly inspire the research on group III-V semiconductors for MOS channels integrated with high-k dielectrics. Recently, after over 30 years of research, a significant progress in characteristics of n-MOSFET with GaAs and InGaAs surface channels has been achieved using GaGdO high-k oxide [1,2], atomic layer deposited Al 2 O 3 [3], amorphous Si and Ge passivation layers [4,5]. To maintain high electron mobility in InGaAs/InP channel, it has to be separated from high-k oxide by a thin barrier layer, In 0.52 Al 0.48 As being the most desirable candidate due to its large conduction band offset with InGaAs.…”
Section: Introductionmentioning
confidence: 99%
“…However, it is inconclusive in explaining the improvement. The G m-max of the Al 2 O 3 /GGO/In 0.75 Ga 0.25 As MOSFET is one of the highest among those reported for (In)GaAs MOSFETs [11,[13][14][15][16][17][18][19][20][21][22][23]. However, it is lower than the value of the Al 2 O 3 /GGO/ In 0.53 Ga 0.47 As MOSFET, which is attributed to the thicker oxide and higher channel doping concentration used in this work.…”
Section: Resultsmentioning
confidence: 61%
“…After a post-deposition annealing at 300 1C for 20 min in N 2 ambient, the gate oxides were covered with TiN of about 0.2 mm thickness using reactive sputtering from a pure Ti target in Ar/N 2 RFplasma. The device was subsequently fabricated using a self-aligned process [22]. A Pd/Ge/Ti/Pt metal stack, deposited at S/D regions using e-beam/thermal evaporation, formed good alloyed ohmic contact on n-type InGaAs without spiking.…”
Section: Methodsmentioning
confidence: 99%
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“…The D it distribution may explain the device performances in inversion-channel InGaAs MOSFETs. For example, self-aligned inversion-channel In 0.2 Ga 0.8 As MOSFETs with MBE-Al 2 O 3 /GGO as the gate dielectric and TiN as the metal gate gave a drain current I d of 1.5 mA/mm (at V G of 4 V and V D of 2 V), and a transconductance G m of 1.7 mS/mm (at V D of 2 V) for a device with gate length of 4 mm [22]. In comparison, the inversion-channel In 0.2 Ga 0.8 As MOSFETs with ALD-Al 2 O 3 as the gate dielectric and TiAu as the metal gate gave an I d of 0.12 mA/mm measured at V G of 12 V and V D of 2 V for a device with a gate length of 1 mm [23].…”
Section: Resultsmentioning
confidence: 99%