1989
DOI: 10.1149/1.2096763
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Silicide Formation on Polycrystalline Silicon by Direct Metal Implantation

Abstract: Increases in component packing densities have led to decreasing lateral and vertical dimensions within integrated circuits. Reduced cross-section conductors can have unacceptably high resistances which leads to increased signal propagation delays. This is especially true

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Cited by 3 publications
(1 citation statement)
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“…In micromechanical applications the surfaces on which the interconnects are needed are often made of polysilicon (poly-Si) or amorphous silicon (a-Si) in order to achieve a better insulation between the individual interconnection lines. Investigations of silicide formation in poly-Si have been performed by Kozicki and Robertson [12]. The best value of sheet resistance obtained in that work was 0.75 −1 which corresponds to a resistivity of 15 µ cm at a layer thickness of 200 nm.…”
Section: Introductionmentioning
confidence: 96%
“…In micromechanical applications the surfaces on which the interconnects are needed are often made of polysilicon (poly-Si) or amorphous silicon (a-Si) in order to achieve a better insulation between the individual interconnection lines. Investigations of silicide formation in poly-Si have been performed by Kozicki and Robertson [12]. The best value of sheet resistance obtained in that work was 0.75 −1 which corresponds to a resistivity of 15 µ cm at a layer thickness of 200 nm.…”
Section: Introductionmentioning
confidence: 96%