Silicon debug: scan chains alone are not enough

Abstract

I For today's multi-million transistor designs, existing design verijication techniques cannot guarantee that first silicon 1 is designed error free. Therefore, techniques ate necessary to eflciently debug firstsilicon. In this article, we present a methodology for debugging multiple clock domain systems-on-a-chip. In addition to scan chains, a set of Design-for-Debug modules is 1 designed into an IC to make it debuggable. bebugger tool sofhvare interacts with the on-chip DjD to make the debug features available from a workstation.

Enabling efficient post-silicon debug by clustering of hardware-assertions

“…In these arrangements c is number of the trace-register that can be embedded into trace data, m is the number of hardwareassertion inside each cluster and s is the number of the clusters. For example, in our test case, AMBA 3 AXI Bus protocol all these configuration are valid: (2,3,28), (1,4,22), (1,5,17), (1,6,15) , (1,8,11), (1,9,10), (1,14,9), (1,15,7).…”

“…For energy consumption, configuration (1,8,11) is the best. (2,3,28) 28.70 0.21 (1,4,22) 28.50 0.21 (1,5,17) 28.42 0.20 (1,6,15) 28.11 0.20 (1,7,13) 28.02 0.18 (1,8,11) 28.20 0.17 (1,9,10) 28.32 0.20 (1,14,9) 28.40 0.21 (1,15,7) 28.70 0.22 No clustering 29.01 0.32…”

“…Almost two thirds of newly manufactured SoCs product suffers from bugs at the first silicon [1]. Logic errors are still among the main causes of failures, including the fact that pre-silicon verification is applied to the model of the IC, and not the actual product [6].…”

“…RELATED WORK Existing post-silicon debug techniques can be divided into two approaches: trace-based and scan-based. Various implementations for either of them have been realized by previous studies [4] [6]. The primary goal in the scan based debug techniques is reusing the internal scan chains which were used during the manufacturing test.…”

“…At the first step, whenever a specific trigger or hardware checker fires all the internal state elements using these available scan chains will be captured; thereafter these captured data can be offloaded using these scan-out operation of these scan chains [9]. Due to the consecutive stops and resumption during scan dump, this method will not provide the real-time debug information [6].…”