I For today's multi-million transistor designs, existing design verijication techniques cannot guarantee that first silicon 1 is designed error free. Therefore, techniques ate necessary to eflciently debug firstsilicon. In this article, we present a methodology for debugging multiple clock domain systems-on-a-chip. In addition to scan chains, a set of Design-for-Debug modules is 1 designed into an IC to make it debuggable. bebugger tool sofhvare interacts with the on-chip DjD to make the debug features available from a workstation.

Abstract-This paper presents an application domain driven approach to the design of embedded systems on silicon, and it shows how this approach is used to design a chip for a multiwindow TV application. We discuss all major design steps in a logical order starting with an application domain analysis. This lead to the choice of Kahn data flow graphs as the programming paradigm for high-throughput signal applications. Based on this analysis we designed a multiprocessor architecture which uses run-time reconfiguration. Finally, attention is spent toward the physical implementation and the deep-submicron problems we had to solve. The result is a chip that can manage up to 25 internal real-time video streams. The chip combines the flexibility of a programmable solution with the cost effectiveness of a consumer product.

Abstract-This paper presents an application domain driven approach to the design of embedded systems on silicon, and it shows how this approach is used to design a chip for a multiwindow TV application. We discuss all major design steps in a logical order starting with an application domain analysis. This lead to the choice of Kahn data flow graphs as the programming paradigm for high-throughput signal applications. Based on this analysis we designed a multiprocessor architecture which uses run-time reconfiguration. Finally, attention is spent toward the physical implementation and the deep-submicron problems we had to solve. The result is a chip that can manage up to 25 internal real-time video streams. The chip combines the flexibility of a programmable solution with the cost effectiveness of a consumer product.

Organizer & Moderator Erik Jan Marinissen -Philips Research (Eindhoven, The Netherlands) co-organized in cooperation with IEEE's Design & Test of ComputersModern semiconductor process technologies, advanced design tools, and the reinvented reuse paradigm enable the design of very complex ICs. Some call these ICs 'system-on-chip', referring to the fact that their functionality could until recently only be implemented by one or several PCBs filled with ICs. While it was always difficult to locate design errors, guaranteeing that a deep sub-micron 'system-on-chip' is design error free is a real challenge. Floating specifications, growing geographicallyspread design teams, time-to-market pressure, and the increasing distance of IC designers to actual silicon all make it likely that 'buggy' hardware will become as common as 'buggy' software.Of course our industry does whatever is possible within given time and money budgets to prevent design errors before first silicon. Hereto techniques as simulation, emulation, and formal verification are used. However, all these techniques only deal with models of the IC, which do not take into account all effects that might occur on real silicon, and high computational costs often prevent exhaustive error coverage. In order to find design errors before the customer does, debug of actual silicon samples is inevitable.This Hot Topic session provides an overview of the state-of-the-art in physical and electrical silicon debug. The speakers address techniques currently in use, their applications and their limitations, and the research challenges for the future. (EJM)

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