Silicon Nitride (Si₃N₄) (De-)Multiplexers for 1-μm CWDM Optical Interconnects

Abstract

We discuss the design and demonstration of 4-channel coarse wavelength-division (de-)multiplexers based on cascaded Mach-Zehnder interferometer (MZI) lattice filters and arrayed waveguide gratings (AWG) on a 150 nm silicon nitride (Si 3 N 4) platform. The 1 × 4 (de-)multiplexers are designed for a channel separation of 25 nm and operate within 990-1065 nm for bottom emitting vertical cavity surface emitting lasers (VCSEL)-based optical links. For Si 3 N 4 Gaussian AWGs, we demonstrate crosstalk <−35 dB at the peak transmission band with insertion loss <0.5 dB. Measurements were performed over many dies, and passband standard deviations for channel 1-4 are 0.49, 0.66, 0.42, and 0.37 nm, respectively. Results for flat-top AWGs indicate crosstalk <−20 dB, with insertion loss <3 dB for the best devices. Flattop cascaded 2 nd order and 3 rd order MZI lattice filters show a minimum of crosstalk <−15 dB and <−20 dB, respectively. The pass-band temperature shift was determined to be 14.5 pm/°C, which is lower than reported values for silicon. The device footprint of the Gaussian and flat-top AWGs are both ∼670 × 200 µm. The device footprint of the flat-top cascaded 2 nd order and 3 rd order lattice filters are 1160 × 470 µm and 1570 × 470 µm, respectively. We believe the Si 3 N 4 platform has potential for its use in CWDM and possibly DWDM transceiver/optical-modules for data/computer communication in high temperature environments up to 80°C. Index Terms-Optical interconnects, photonic integrated circuits, silicon nitride, silicon photonics. I. INTRODUCTION T HERE continues to be an increased demand for high bandwidth density optical interconnects for future mega data centers, long-haul communications, and peta/exa-scale high performance computing (HPC). One study suggests annual global data center IP traffic will reach 20.6 Zettabytes (ZB) by the end of 2021; 94% of those workloads will be processed by cloud data centers and 6% by traditional data centers [1]. In another study, it is estimated by 2020, HPC peak performance will exceed 1 exaflop and require 800 million optical channels with each channel operating at ∼25 Gb/s, 1mW/Gb/s, and at $25/Tb/s [2]. Recently, Hewlett Packard Enterprise announced a new memory centric architecture where CPUs and a universal pool of memory (DRAM, SSD, NVRAM, etc.) are interconnected through a high

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