Silicon Solar Cell Architecture with Front Selective and Rear Full Area Ion‐Implanted Passivating Contacts

Abstract

In this work, the application of carrier-selective passivating contacts based on tunneling silicon-dioxide and ion-implanted poly-Si in front and rear contacted Si solar cells is presented. This paper addresses the need to minimize the contact recombination while still keeping high short circuit current. We aim to solve such trade-off with a novel solar cell architecture called Passivated Rear and Front ConTacts (PeRFeCT). Such design employs a selective passivating contact combined with standard homojunction on the front side in order to minimize contact recombination, while achieving high optical transparency and a full area passivating contact on the rear side. The opto-electrical modeling of this front/rear contacted architecture indicates a potential efficiency above 26%. As technology demonstration, we also report on the optimization of front surface field and processing of 2.8 Â 2.8 cm 2 wide solar cells leading to a 20.1% conversion efficiency.

Implantation‐based passivating contacts for crystalline silicon front/rear contacted solar cells

“…Another possible solution is to change the front side structure with either amorphous silicon or a lightly doped homojunction front surface field with poly‐Si passivating contacts only underneath the contacts. Figure shows the EQE of SC3 , a hybrid solar cell from, and a PeRFeCT solar cell from . With both the hybrid and the PeRFeCT architectures losses in the blue part of the spectrum can be mitigated.…”

“…At rear side, a stack of Ag/Cr/Al (200 nm/30 nm/2 μm) is evaporated through a hard mask to define the cell area of 2.8 cm × 2.8 cm (7.84 cm 2 ), while, at the front side, a 2-μm-thick e-beam evaporated Al metal grid (5% metal coverage) is structured via photolithography, etching of SiN x ARC, evaporation, and liftoff. 27 Additionally, the front grid of some solar cells is Cu-plated by means of a mask-less process (plating current density of 576 mA/cm 2 for 1500 s) using evaporated titanium as seed layer. 46 For solar cells with decoupled front/rear poly-Si thicknesses, the fabrication process consists in repeating twice the SiO 2 /poly-Si deposition using a SiN x layer to protect one of the wafer's surface and a poly-Si etching in between.…”

“…To minimize reflection losses, a 75‐nm‐thick SiN x layer is deposited by PECVD on the textured front side (see Figure D) and finally, the cells are completed with metal contacts (see Figure E). At rear side, a stack of Ag/Cr/Al (200 nm/30 nm/2 μm) is evaporated through a hard mask to define the cell area of 2.8 cm × 2.8 cm (7.84 cm 2 ), while, at the front side, a 2‐μm‐thick e‐beam evaporated Al metal grid (5% metal coverage) is structured via photolithography, etching of SiN x ARC, evaporation, and lift‐off . Additionally, the front grid of some solar cells is Cu‐plated by means of a mask‐less process (plating current density of 576 mA/cm 2 for 1500 s) using evaporated titanium as seed layer .…”

“…Figure 14 shows the EQE of SC3, a hybrid solar cell from, 39 and a PeRFeCT solar cell from. 27 With both the hybrid and the PeRFeCT architectures losses in the blue part of the spectrum can be mitigated. The poor responsivity at the short-wavelength of our poly-poly cell is much less problematic if such architecture is deployed in a tandem configuration together with a thin-film top cell such as perovskite, 29 either in a monolithic configuration or in a four-terminal configuration.…”

“…Poly‐silicon based CSPCs are successfully applied at cell level using different device architectures, such as IBC solar cellswith a remarkable efficiency over 26% or bifacial and FBC solar cells . Similarly, promising hybrid concepts combining homo‐junction with poly‐Si CSPC are under research as front homo‐junction and CSPC at the back side with experimental η very close to 26% and selective front surface field (FSF) architecture and rear poly‐Si CSPC with modelled η also in the range of 26%.…”