Simulation-Based Study of Hybrid Fin/Planar LDMOS Design for FinFET-Based System-on-Chip Technology

Wu, Yi-Ting; Ding, Fei; Connelly, Daniel; Zheng, Peng; Chiang, Meng-Hsueh; Chen, Jone F.; Liu, Tsu‐Jae King

doi:10.1109/ted.2017.2736442

Cited by 30 publications

(8 citation statements)

References 19 publications

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“…Recently, several groups have reported machine learning applications to power device design. [21][22][23][24][25] However, reported methods require high simulation numbers of more than 1000 for training to obtain high accuracy, and it is difficult to optimize parameters taking into account the process margin at the same time.…”

Section: Introductionmentioning

confidence: 99%

Automatic total performance design of low-voltage power MOSFETs using zoomed response surface method

Saito

2023

Jpn. J. Appl. Phys.

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As a simple design method, zoomed response surface (RS) method is useful for automatic design of low-voltage power MOSFETs. Low-voltage MOSFET characteristics have been improved continuously considering with not only low power loss but also low cost to answer request to high-performance system. Complicated requirements lead long development schedule and low yield. Model-based design and machine learning are prospective method to answer the problem. However, reported methods require many simulation numbers (>1000) for training to obtain high accuracy, and it is difficult to optimize parameters considering the process margin at the same time. This article shows a demonstration of zoomed RS method for automatic design of 100 V-class power MOSFETs. Five parameters were automatically designed for not only minimizing on-resistance but also minimizing total power loss, taking into account process margin and switching noise with simulation number of 130 only.

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Section: Introductionmentioning

confidence: 99%

Automatic total performance design of low-voltage power MOSFETs using zoomed response surface method

Saito

2023

Jpn. J. Appl. Phys.

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“…Model-based design and machine learning are prospective method to answer the problem. Recently, several groups have reported machine learning application to power device design [7]- [11]. However, reported methods require many simulation numbers of more than 1000 for training to obtain high accuracy, and it is difficult to optimize parameters considering the process margin at the same time.…”

Section: Introductionmentioning

confidence: 99%

Zoomed Response Surface Method for Automatic Design in Parameters Optimization of Low-Voltage Power MOSFET

Saito

Nishizawa

2022

IEEE J. Electron Devices Soc.

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A new parameter optimization method using zoomed response surface (RS) is proposed for automatic design of low-voltage power MOSFET. Low-voltage MOSFET characteristics have been improved continuously considering with not only low power loss but also low cost to answer request to high-performance system. Complicated requirements lead long development schedule and low yield. Model-based design and machine learning are prospective method to answer the problem. However, reported methods require many simulation numbers (> 1000) for training to obtain high accuracy, and it is difficult to optimize parameters considering the process margin at the same time. This article shows a simple design method using zoomed RS. Five parameters were automatically designed, taking account to process margin with simulation number of 130 only.INDEX TERMS Field plate, power MOSFET, on-resistance, automatic design.

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“…Based on their excellent properties, FinFETs have also attracted great attention in system-on-a-chip (SoC) technology [5,6]. A FinFET design suitable for SoC technology has been actively pursued, and related studies are underway [7][8][9][10]. Most of these studies aim at realizing a high-voltage device based on the FinFET with a lower leakage current, lower hot carrier injection, and higher breakdown voltage (V BD ) [6].…”

Section: Introductionmentioning

confidence: 99%

A drain extended FinFET with enhanced DC/RF performance for high-voltage RF applications

Kim

Park

et al. 2022

Semicond. Sci. Technol.

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A drain-extended (DE) FinFET with a dual material gate (DMG) and a high-k field plate (FP), named DF-DeFF, is proposed for high-voltage RF applications. The FP induces the charge variation in the drain extension, which appears as either the extended depletion in the gate-off state or the electron accumulation in the gate-on state. Along with the FP, the DMG forms a step-like potential variation along the channel, which leads to electron acceleration and the screening effect on the drain-to-source voltage (VDS). These effects give significant advantages to the DC characteristics, including breakdown voltage (VBD) and on-resistance (Ron), and the RF characteristics, including transconductance (gm) and output-resistance (ro). Compared to the latest high-voltage RF FinFETs, the DF-DeFF shows a drastic improvement in the major performance indicators such as VBD, cut-off frequency (fT), and maximum oscillation frequency (fMAX). These results indicate that DF-DeFF is a FinFET with sufficient competitiveness even in high voltage circumstances.

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Simulation-Based Study of Hybrid Fin/Planar LDMOS Design for FinFET-Based System-on-Chip Technology

Cited by 30 publications

References 19 publications

Automatic total performance design of low-voltage power MOSFETs using zoomed response surface method

Automatic total performance design of low-voltage power MOSFETs using zoomed response surface method

Zoomed Response Surface Method for Automatic Design in Parameters Optimization of Low-Voltage Power MOSFET

A drain extended FinFET with enhanced DC/RF performance for high-voltage RF applications

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