Simulative analysis of the RapidIO embedded interconnect architecture for real-time, network-intensive applications

Abstract

RapidIO is an emerging standard for switched interconnection of processors and boards in embedded systems. In this paper, we use discrete-event simulation to evaluate and prototype RapidIO-based systems with respect to their performance in an environment targeted towards space-based radar applications. This application class makes an ideal test case for RapidIO feasibility study due to high system throughput requirements and real-time processing constraints. Our results show that a baseline RapidIO system is well suited to space-based radar, providing significant improvements over typical bus-based architectures. Our results also show that extensions to the RapidIO protocol such as cut-through routing and transmittercontrolled flow-control would provide minimal performance improvements for the applications under study.

Real-time parallel implementation of Pulse-Doppler radar signal processing chain on a massively parallel machine based on multi-core DSP and Serial RapidIO interconnect

“…To our best knowledge, Bueno et al [3,[21][22][23][24][25] works are the closest to our research study. They have worked on the modeling and simulation of a multi-processor system based on multiple ASICs processing nodes interconnect by RapidIO bus.…”

“…The parallel efficiency obtained is about 90%. Previous work [3,[21][22][23][24][25]] using the straightforward model to distribute a radar application on a parallel machine based on a RapidIO interconnect have achieved a parallel efficiency that does not exceed 40%.…”

“…Bueno et al [3,[21][22][23][24][25] were interested in using the RapidIO embedded interconnect in system architectures for space-based radar. They have studied two algorithms: ground moving target indicator (GMTI) and synthetic aperture radar (SAR).…”

“…The simulation work also concerned the RapidIO space systems network fault tolerance. They have presented in [3,22] simulation results of mapping a parallel GMTI application on an embedded multi-processor satellite processing system using a RapidIO interconnection. Three partitioning methods of the real-time GMTI algorithm have been studied.…”

“…Both systems consist of different processing nodes, but both have the same architecture and use RapidIO protocol as an inter-processor communication bus. Also, Bueno et al [3,[21][22][23][24][25] have studied a radar application that has constraints similar to ours in terms of high-processing power and harsh real-time needs. Finally, they have studied a straightforward approach to distribute the radar processing.…”