Single-Event Burnout Hardening of Power UMOSFETs With Optimized Structure

Wang, Ying; Zhang, Yue; Wang, Liguo; Yu, Cheng-Hao

doi:10.1109/ted.2013.2256426

Cited by 25 publications

(6 citation statements)

References 27 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Worst case response may not occur with the incident ion perpendicular to the die surface, but the worst case may be at beam angles almost parallel to the die surface [21]. Wang et al in other work [22] have used TCAD simulation to explore SEB hardening strategies for UMOSFETs. Simulations indicated that enlarging the p + plug and the addition of a buffer layer between the epitaxial layer and substrate can reduce SEB susceptibility with the buffer layer making the most difference.…”

Section: Single Event Burnout (Seb) Effects In Umos Technologymentioning

confidence: 99%

A Brief Review of Heavy-Ion Radiation Degradation and Failure of Silicon UMOS Power Transistors

Galloway

2014

Electronics

View full text Add to dashboard Cite

Silicon VDMOS power MOSFET technology is being supplanted by UMOS (or trench) power MOSFET technology. Designers of spaceborne power electronics systems incorporating this newer power MOSFET technology need to be aware of several unique threats that this technology may encounter in space. Space radiation threats to UMOS power devices include vulnerabilities to SEB, SEGR, and microdose. There have been relatively few studies presented or published on the effects of radiation on this device technology. The S-O-A knowledge of UMOS power device degradation and failure under heavy-ion exposure is reviewed.

show abstract

Section: Single Event Burnout (Seb) Effects In Umos Technologymentioning

confidence: 99%

A Brief Review of Heavy-Ion Radiation Degradation and Failure of Silicon UMOS Power Transistors

Galloway

2014

Electronics

View full text Add to dashboard Cite

show abstract

“…Many hardening solutions to SEB of power DMOSFETs have been extensively investigated and tested these years. For power UMOSFETs [22]- [24], the research of SEB characteristic, especially for how to design hardened structure to prevent SEB need to be studied [25]. The Schottky contact is often used to improve the reverse recovery characteristics in power MOSFETs [26], [27].…”

Section: Introductionmentioning

confidence: 99%

Single-Event Burnout Hardened Structure of Power UMOSFETs With Schottky Source

Wang

Zhang

Cao

et al. 2014

IEEE Trans. Power Electron.

Self Cite

View full text Add to dashboard Cite

This paper investigates the single-event burnout (SEB) simulation results for both the standard and hardened structure of power U-shape gate MOSFETs (UMOSFETs). The Schottky source is proposed to reduce the work of the parasitic bipolar transistor inherent to the device. The hardened structure of power UMOSFETs with the Schottky source and N buffer layer is given, which can work normally and improve the SEB performance effectively. Both 70-and 120-V power MOSFETs are simulated and discussed in this paper. The SEB threshold voltages are increased to more than 94 percent of the breakdown voltages for both 70-and 120-V hardened structure, compared to 54 percent for standard power UMOSFETs.Index Terms-Hardened structure, power UMOSFET, Schottky source, single-event burnout (SEB).

show abstract

“…Previous literature has extensively investigated many potential hardening techniques to improve the SEE survivability of trench MOSFET which is also known as power U-shape Metal Oxide Semiconductor Field Effect Transistor (UMOSFET) [7][8][9][10][11][12]. Previous solutions are mainly focused on the Radiation Hardened by Design (RHBD) techniques to mitigate the radiation effects in UMOSFET.…”

Section: Introductionmentioning

confidence: 99%

Single event burnout hardening of trench shielded power UMOSFET using High-κ dielectrics

Krishnamurthy

Kannan

Hussin

2020

Mater. Res. Express

View full text Add to dashboard Cite

This study proposes the High-κ dielectric Trench Shielded power UMOSFET (HK TS-UMOSFET) to be assessed using the two-dimensional numerical simulations. The simulations are employed to evaluate HK TS-UMOSFETs susceptibility to single-event burnout (SEB) mechanism. Based on the findings, the influence of alternative high permittivity gate dielectrics to silicon dioxide (SiO 2 ) in TS-UMOSFET was discussed. Furthermore, in order to improve the performance of the device, its electrical behaviour was simulated with several high-κ dielectrics including Al 2 O 3 , Si 3 N 4 and Aluminium Nitride (AlN). When heavy ions strike the sensitive areas of the device, the electric field distribution and SEB threshold values were extracted. Based on the values yielded, (AlN) was identified as a promising high-κ material to achieve SEB-hardened TS-UMOSFET compared to the other highκ dielectrics. In conclusion, with (AlN), the HK TS-UMOSFET offers a high SEB tolerance and improved electrical characteristics.

show abstract

Single-Event Burnout Hardening of Power UMOSFETs With Optimized Structure

Cited by 25 publications

References 27 publications

A Brief Review of Heavy-Ion Radiation Degradation and Failure of Silicon UMOS Power Transistors

A Brief Review of Heavy-Ion Radiation Degradation and Failure of Silicon UMOS Power Transistors

Single-Event Burnout Hardened Structure of Power UMOSFETs With Schottky Source

Single event burnout hardening of trench shielded power UMOSFET using High-κ dielectrics

Contact Info

Product

Resources

About