Single-Event Effects in SiC Double-Trench MOSFETs

Zhou, Xintian; Tang, Yun; Jia, Yunpeng; Hu, Dongqing; Wu, Yu; Xia, Tian; Gong, Hao; Pang, Haoyang

doi:10.1109/tns.2019.2944944

Cited by 38 publications

(13 citation statements)

References 32 publications

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“…Ball等 [11] 通过仿真模拟重离子入射SiC MOSFET 器件, 发现离子入射诱导产生高局域态能量脉冲导致器件性能退化或者烧毁; 同时该团队 [12] 通过实验对比和仿真模拟发现, 更厚的外延层、更低的掺杂浓度可以显著增大器件SEB阈值电压. 目前商用的SiC MOSFET分为平面栅型和沟槽型两种结构 [13] , 在相同元胞尺寸下, 双沟槽型碳化硅MOSFET (double-trench MOSFET, DT-MOSFET)相比于传统平面栅型碳化硅MOSFET (vertical double-diffused MOSFET, VDMOSFET), 具有更高的沟道迁移率、更低的比导通电阻以及更大的电流密度, 优异的性能使得SiC DTMOSFET 具有更广阔的应用前景 [14][15][16][17] . 然而, 目前大多数研究都是针对SiC VDMOSFET的单粒子效应, 关于SiC DTMOSFET的单粒子效应研究较少.…”

Section: 不同Let值的重离子实验发现器件seb阈值电压会随入射离子Let值的增大而显著降低当unclassified

Heavy ion single event effect in double-trench SiC metal-oxide-semiconductor field-effect transistors

Li,

Guo,

Zhang

et al. 2024

Acta Phys. Sin.

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In the paper, experiments on 208 MeV Ge ion irradiation with different source-drain bias voltages were carried out for the double-trench SiC metal–oxide–semiconductor field-effect transistors, and the physical mechanism of the single event effect was analyzed. The experimental results show that the drain leakage current of the device increases more obviously with the increase of the initial bias voltage during irradiation. When the bias voltage was 400 V during irradiation, the device has a single event burned in the fluence of 9×104 ion/cm2, and the bias voltage was 500 V, the device has a single event burned in the fluence of 3×104 ion/cm2, so when the LET value was 37.3 MeV·cm2/mg, the SEB threshold of DUTs does not exceed 400 V, which was lower than 34 % of the rated operational voltage. The post gate-characteristics test results show that the leakage current of the device with bias voltage of 100 V did not change significantly during irradiation, When the bias voltage is 200 V and 300 V, the gate leakage and the drain leakage of the device are increased, which is positively related with bias voltage. Combined with TCAD simulation further analysis device single particle effect mechanisms, the simulation results show that at low bias voltage, the heavy ion incident device generates electron-hole pairs, the electrons are quickly swept out, and the holes accumulate at the gate oxygen corner under the effect of the electric field, which combine with the source-drain bias voltage leads to the formation of leakage current channels in the gate oxygen layer. At high bias voltage, the electrons generated by the heavy ion incident move towards the junction of the N- drift layer and the N+ substrate under the effect of the electric field, which further increases the electric field strength and causes significant impact ionization. The local high current density generated by the impact ionization and the load large electric field causes the lattice temperature to exceed the melting point of silicon carbide, and causes single event burnout. This work provides a reference and support for the study of radiation effect mechanism and application of silicon carbide power devices for aerospace applications.

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Section: 不同Let值的重离子实验发现器件seb阈值电压会随入射离子Let值的增大而显著降低当unclassified

Heavy ion single event effect in double-trench SiC metal-oxide-semiconductor field-effect transistors

Li,

Guo,

Zhang

et al. 2024

Acta Phys. Sin.

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“…The device biased at V GS = 0 V suffers from a vertical strike in the mesa region, where it is regarded as the most sensitive area concerning SEB failure in a double-trench MOSFET structure from our previous simulations. 25) It should be noted that, for simplicity, the self-heating effect is not considered. The simulation results, however, could still reveal the radiation characteristics of devices qualitatively, 26,27) especially for comparison here.…”

Section: Radiation Characteristicsmentioning

confidence: 99%

SiC double-trench MOSFETs with source-recessed structure for enhanced ruggedness

Wang¹,

Jia²,

Zhou³

et al. 2021

Jpn. J. Appl. Phys.

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A novel SiC double-trench MOSFET (DT-MOS) with source-recessed structure is proposed and investigated via Sentaurus TCAD simulations in this paper. The lateral resistance area beneath the source region is completely eliminated, thus suppressing the turn-on of the parasitic npn transistor effectively. As a result, the short-circuit withstanding time, the single pulse avalanche energy (E av) under unclamped inductive switching test and the threshold voltage for single-event burnout are improved by 28%, 14% and 67%, respectively, when compared to the traditional state-of-the-art SiC DT-MOS, indicating its great potential for harsh environment applications.

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“…In recent years, the radiation damage effects and radiation hardening techniques of SiC VDMOS devices have gradually become a research hotspot due to their sensitivity to radiation-induced damage in the oxide layer. Among them, the function disablement characteristic of SEE radiation damage has received extensive attention both domestically and abroad [13][14][15][16]. Increasing the thickness of the VDMOS oxide layer is a commonly employed measure to strengthen resistance against SEEs.…”

Section: Introductionmentioning

confidence: 99%

Total Ionizing Dose Effects of 60Co γ-Ray Radiation on Split-Gate SiC MOSFETs

Feng

Liang

et al. 2023

Electronics

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SiC power devices require resistance to both single-event effects (SEEs) and total ionizing dose effects (TIDs) in a space radiation environment. The split-gate-enhanced VDMOSFET (SGE-VDMOSFET) process can effectively enhance the radiation resistance of SiC VDMOS, but it has a certain impact on the gate oxide reliability of SiC VDMOS. This paper investigates the impact mechanism and regularity of using the SGE process to determine the radiation resistance and long-term reliability of SiC VDMOS under other identical processes and radiation conditions. Our experimental results show that after 60Co γ-ray irradiation, the degradation degrees of the static parameters of SGE-VDMOSFET and planar gate VDMOSFET (PG-VDMOSFET) are similar. The use of the new process leads to more defects in the oxide layer, reducing the long-term reliability of the device, but its stability can recover after high-temperature (HT) accelerated annealing. This research indicates that enhancing the resistance of SEEs using an SGE-VDMOSFET structure requires simultaneously considering the demand for TIDs and long-term reliability.

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Single-Event Effects in SiC Double-Trench MOSFETs

Cited by 38 publications

References 32 publications

Heavy ion single event effect in double-trench SiC metal-oxide-semiconductor field-effect transistors

Heavy ion single event effect in double-trench SiC metal-oxide-semiconductor field-effect transistors

SiC double-trench MOSFETs with source-recessed structure for enhanced ruggedness

Total Ionizing Dose Effects of 60Co γ-Ray Radiation on Split-Gate SiC MOSFETs

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