Single-level integrity and confidentiality protection for distributed shared memory multiprocessors

Abstract

Multiprocessor computer systems are currently widely used in commercial settings to run critical applications. These applications often operate on sensitive data such as customer records, credit card numbers, and financial data. As a result, these systems are the frequent targets of attacks because of the potentially significant gain an attacker could obtain from stealing or tampering with such data. This provides strong motivation to protect the confidentiality and integrity of data in commercial multiprocessor systems through architectural support. Architectural support is able to protect against software-based attacks, and is necessary to protect against hardware-based attacks. In this work, we propose architectural mechanisms to ensure data confidentiality and integrity in Distributed Shared Memory multiprocessors which utilize a point-topoint based interconnection network. Our approach improves upon previous work in this area, mainly in the fact that our approach reduces performance overheads by significantly reducing the amount of cryptographic operations required. Evaluation results show that our approach can protect data confidentiality and integrity in a 16-processor DSM system with an average overhead of 1.6% and a maximum of only 7% across all SPLASH-2 applications.

Multi-processor architectural support for protecting virtual machine privacy in untrusted cloud environment

“…There have been many designs for encrypting physical memory to counter physical attacks (e.g., [34,35,36,21,37,18,38,39,40,41]). Representation examples are: 1) protecting data privacy by performing decryption in parallel to memory access [21]; 2) protecting data privacy and integrity in distributed shared memory multi-processors systems [39] by adapting the Galois/Counter Mode of operation with the counter-mode encryption [38], or by using the address independent counter-mode encryption and Merkle tree built on top of the counters [42]; 3) preventing secret leakage against intrusive memory attack by integrating secret sharing and coding based schemes [40]; 4) a hybrid hardware-software approach to full system security named SecureME [41]. However, it is not clear at all how these solutions can be retrofitted to solve the problem we aim to tackle.…”

Security extensions for integrity and confidentiality in embedded processors

“…The proposed architectures are thus applicable to unmodified legacy code. Furthermore, we detect tampered instructions and data before they can cause harm to the system, unlike the architectures proposed in [27,[43][44]. Our approach offers high cryptographic strength with low performance and energy overhead.…”

“…This overhead may be artificially low as they use "non-precise integrity verification," which allows potentially harmful instructions to execute and retire before they are verified. Their research has also been extended into the multiprocessor domain [44].…”

PoisonIvy: Safe speculation for secure memory

“…A less conservative approach allows the memory controller to return unverified data to the core, assuming that the window of vulnerability between data use and verification is too short for attackers to exploit [6], [25], [27], [38], [47]. Shi et.al., close this vulnerability by stalling stores until all outstanding verifications complete ("authen-then-write") [32].…”

“…It ensures confidentiality with encryption and ensures integrity with Merkle trees [4], [6], [10], [38]. Security adds overheads, motivating performance optimizations that cache metadata and speculate around safeguards [11], [26], [27], [33], [34], [37], [49]. We survey recent progress to motivate our solution, PoisonIvy, which builds atop best practices to address remaining performance challenges.…”