SOI CMOS Transistors for RF and Microwave Applications

Flandre, Denis

doi:10.1016/s0129-1564(01)00107-6

Cited by 16 publications

(1 citation statement)

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“…This limitation will be less in a mixed signal process with well controlled device parameters, especially threshold voltages of the low-threshold transistors [2]. This is expected to improve further with advanced processes that will have symmetric threshold voltages for PMOS and NMOS devices [3], [4].…”

Section: System Level Considerationsmentioning

confidence: 99%

Analog signal processing in deep submicron CMOS technologies using inverters

Raghunandan

Sun

Viswanathan

2014

2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS)

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Analog signal-processing in deep sub-micron technologies poses many challenges arising from both low supply voltage and intrinsic voltage-gain of short channel devices. Class-AB CMOS transconductance obtained by a pair of complementary transistors is a widely used power efficient building block because it has linear v − i characteristics. This is topologically the same as the logic inverter of CMOS digital systems. This block enables the basic signal-processing operations of addition, subtraction, scaling and integration. Replica-circuits are used to keep the large process, voltage and temperature (PVT) variations under control. Thus we can perform analog signal-processing at a level of precision required for designing high-speed data communication systems. This paper discusses this in a canonical fashion. Simulation results using device models for 65 nm CMOS process are presented to validate these ideas.

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Section: System Level Considerationsmentioning

confidence: 99%