Spatial yield modeling for semiconductor wafers

Mirza, Anusha; O'Donoghue, G.; Drake, A.W.; Graves, Stephen C.

doi:10.1109/asmc.1995.484386

Cited by 12 publications

(4 citation statements)

References 21 publications

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“…This makes the task of deriving the yield measuring variables' distributions with any sufficient accuracy much harder. Thus, most "cdf" based efforts either rely heavy on data mining of fab measured data with all the imprecision it introduces [8,9], or by introducing many assumptions and approximations to alleviate lack of data which results in unpredictable inaccuracies.…”

Section: The Existing Effortsmentioning

confidence: 99%

Hotspot Based Yield Prediction with Consideration of Correlations

Chiang

Kawa

2008

9th International Symposium on Quality Electronic Design (Isqed 2008)

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Design for manufacturability and yield has becomes a major issue for advanced VLSI technology nodes. The demand for a yield prediction capability has been growing significantly. Unfortunately, systematic yield prediction and analysis is still behind in both research and availability of commercial tools. A major reason for that is the high dependency of such research on hard to come by data from fabs. Thus a new approach that limits this dependency is needed. In this paper, we propose a novel and practical approach that enables systematic yield prediction with limited fab information and data. This approach is based on the information of hotspot definitions and their yield scores. The required inputs are more practical and realistic and less confidential. The dependency on the fab data is minimal. In this approach, we propose an algorithm that properly incorporates spatial correlations between yield variables when computing full chip total yield. The predicted total yield score is accurate and robust. We further demonstrate the high level of accuracy by both theory and simulation.

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Section: The Existing Effortsmentioning

confidence: 99%

Hotspot Based Yield Prediction with Consideration of Correlations

Chiang

Kawa

2008

9th International Symposium on Quality Electronic Design (Isqed 2008)

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“…Wafer maps may exhibit spatial dependencies across the wafer, and chip engineers can often trace the cause of defects and resolve problems based on defect type. Mirza et al [10] divided wafer map defect patterns into general and local types, namely global random defects and local defects. The wafer map defect pattern diagram is shown in Figure 3, the local defects are shown in Figure 3a, and the global random defects are shown in Figure 3b.…”

Section: Wafer Surface Defect Pa Ernsmentioning

confidence: 99%

Review of Wafer Surface Defect Detection Methods

et al. 2023

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Wafer surface defect detection plays an important role in controlling product quality in semiconductor manufacturing, which has become a research hotspot in computer vision. However, the induction and summary of wafer defect detection methods in the existing review literature are not thorough enough and lack an objective analysis and evaluation of the advantages and disadvantages of various techniques, which is not conducive to the development of this research field. This paper systematically analyzes the research progress of domestic and foreign scholars in the field of wafer surface defect detection in recent years. Firstly, we introduce the classification of wafer surface defect patterns and their causes. According to the different methods of feature extraction, the current mainstream methods are divided into three categories: the methods based on image signal processing, the methods based on machine learning, and the methods based on deep learning. Moreover, the core ideas of representative algorithms are briefly introduced. Then, the innovations of each method are compared and analyzed, and their limitations are discussed. Finally, we summarize the problems and challenges in the current wafer surface defect detection task, the future research trends in this field, and the new research ideas.

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“…Defects generated on wafers can be classified into 2 categories: random defects and clustered defects (also called global defects and local defects) . Global defects are randomly distributed across a wafer, whereas local defects arise with different spatial patterns, such as lines and circles .…”

Section: Introductionmentioning

confidence: 99%

“…Defects generated on wafers can be classified into 2 categories: random defects and clustered defects (also called global defects and local defects). [3][4][5] Global defects are randomly distributed across a wafer, whereas local defects arise with different spatial patterns, such as lines and circles. 6 Engineering knowledge reveals that the spatial distribution patterns of functional defective chips on a wafer may be attributed to specific causes.…”

Section: Introductionmentioning

confidence: 99%

Wafer yield prediction using derived spatial variables

Dong

Chen

Wang

2017

Quality & Reliability Eng

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Unreliable chips tend to form spatial clusters on semiconductor wafers. The spatial patterns of these defects are largely reflected in functional testing results. However, the spatial cluster information of unreliable chips has not been fully used to predict the performance in field use in the literature. This paper proposes a novel wafer yield prediction model that incorporates the spatial clustering information in functional testing. Fused LASSO is first adopted to derive variables based on the spatial distribution of defect clusters. Then, a logistic regression model is used to predict the final yield (ratio of chips that remain functional until expected lifetime) with derived spatial covariates and functional testing values. The proposed model is evaluated both on real production wafers and in an extensive simulation study. The results show that by explicitly considering the characteristics of defect clusters, our proposed model provides improved performance compared to existing methods. Moreover, the cross‐validation experiments prove that our approach is capable of using historical data to predict yield on newly produced wafers.

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Spatial yield modeling for semiconductor wafers

Cited by 12 publications

References 21 publications

Hotspot Based Yield Prediction with Consideration of Correlations

Hotspot Based Yield Prediction with Consideration of Correlations

Review of Wafer Surface Defect Detection Methods

Wafer yield prediction using derived spatial variables

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