2010
DOI: 10.1007/978-3-642-10701-6_26
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Speeding-Up Expensive Evaluations in High-Level Synthesis Using Solution Modeling and Fitness Inheritance

Abstract: -High-Level Synthesis (HLS) is the process of developing digital circuits from behavioral specifications. It involves three interdependent and NP-complete optimization problems: (i) the operation scheduling, (ii) the resource allocation, and (iii) the controller synthesis. Evolutionary Algorithms have been already effectively applied to HLS to find good solution in presence of conflicting design objectives. In this paper, we present an evolutionary approach to HLS that extends previous works in three respects:… Show more

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Cited by 17 publications
(6 citation statements)
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“…Perhaps the most well-known choices within the EAs literature are fitness inheritance [157] and fitness approximation [70]. Both of them have been used with MOEAs [139], but their use in real-world applications is still scarce [128], mainly because practitioners are either not aware of them or do not trust their reliability in highly nonlinear search spaces [35]. It is also worth remarking that several other approaches exist for improving the efficiency of a MOEA, but most of them remain unused in real-world applications [1], [166].…”
Section: Future Research Pathsmentioning
confidence: 99%
“…Perhaps the most well-known choices within the EAs literature are fitness inheritance [157] and fitness approximation [70]. Both of them have been used with MOEAs [139], but their use in real-world applications is still scarce [128], mainly because practitioners are either not aware of them or do not trust their reliability in highly nonlinear search spaces [35]. It is also worth remarking that several other approaches exist for improving the efficiency of a MOEA, but most of them remain unused in real-world applications [1], [166].…”
Section: Future Research Pathsmentioning
confidence: 99%
“…For many problems, these methods are inefficient in exploring the entire solutions space and converging towards the true Pareto Front (Deb 2008). In (Pilato et al 2010), which is an extended version of (Ferrandi et al 2007), a design space exploration scheme using NSGA-II for area and time optimization during HLS is proposed. The main challenges in applying true multi-objective techniques is to identify an efficient means of generating nondominated solutions from a population besides reducing the effort of computing the fitness of individual solutions.…”
Section: Related Workmentioning
confidence: 99%
“…For instance, a given architectural configuration for chip multiprocessor may required a couple of weeks to be simulated, so statistical simulation [6] or predictive modelling [7] are some of the proposed approaches to reduce that design space. Focusing on reconfigurable devices, evolutionary approaches were proposed in [8] to find a good solution in High-Level Synthesis with conflicting design objectives, [9] focused on the parametrization of soft-core processors through a greedy search method, and a calibration free algorithm for automatic optimization of design parameters was proposed in [10]. None of these works specifically focused on the parametrization of the synthesis, placement and routing processes, but on the architectural features of the designs to be implemented onto the reconfigurable device.…”
Section: Introductionmentioning
confidence: 99%