SPICE compatible modelling of on-chip coupled interconnects

Kumar, R.; Kang, Kai; Rustagi, S.C.; Mouthaan, Koen; Wong, Terence Kin Shun

doi:10.1049/el:20072620

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“…In [9], a framework with RLC components was proposed based on transmission-line theory. In [5,10], multiple cascaded Γ-sections of RLCs were used to model the coupled interconnects. Values of the model components were extracted from two-port S-parameter measurements.…”

Section: Introductionmentioning

confidence: 99%

A SPICE COMPATIBLE MODEL OF ON-WAFER COUPLED INTERCONNECTS FOR CMOS RFICs

Shi¹,

Yeo²,

Lim³

et al. 2010

PIER

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Abstract-This paper investigates the properties of the on-wafer coupled interconnects built in a 0.18 µm CMOS technology for RF applications.A SPICE compatible equivalent circuit model is developed. The proposed model is an extension of a 2-Π equivalent circuit model for single-line interconnects by adding two coupling components. The model parameters are extracted from four-port S-parameter simulation results through a calibrated electromagnetic (EM) simulator, i.e., HFSS. The accuracy of the model is validated from 500 MHz to 20 GHz.

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Section: Introductionmentioning

confidence: 99%