SSDExplorer: A Virtual Platform for Performance/Reliability-Oriented Fine-Grained Design Space Exploration of Solid State Drives

Zuolo, Lorenzo; Zambelli, Cristian; Micheloni, Rino; Indaco, Marco; Carlo, Stefano Di; Prinetto, P.; Bertozzi, Davide; Olivo, P.

doi:10.1109/tcad.2015.2422834

Cited by 20 publications

(17 citation statements)

References 19 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The memory controller architecture we propose has been designed in SystemC. The choice we made is to use an approximately-timed TLM (transaction-level modeling) model (equivalent to the parametric time delay model in [13]) for all the components of the system. The disadvantage of this high level description is the low details description of the communications among the blocks.…”

Section: Memory Controller Architecturementioning

confidence: 99%

“…The impact of software management algorithms such as garbage collection and wear leveling has also been studied in [13]. The results show that execution time becomes marginal and does not affect the overall bandwidth.…”

Section: Interleaving and Multi-channel Techniquesmentioning

confidence: 99%

“…Recently, many methods and tools for the exploration of the NAND flash memory architecture have been proposed and several SSD simulators have been developed [4][5][6][7][8][9][10][11][12][13].…”

mentioning

confidence: 99%

“…The tool proposed in [13], called SSDexplorer, is a complete tool written in SystemC for the design exploration of SSD architecture. Furthermore, the paper presents an interesting overview of SSD emulators with the aim of evidencing the characteristics of the tool they proposed, and the different abstraction levels that can be used to describe the SSD architecture.…”

mentioning

confidence: 99%

“…The authors in [13] state that a high abstraction level allows faster performance estimations, but the accuracy is lost. SSDexplorer uses different abstraction levels for the different components, selecting the most suitable modeling style for each SSD component to accurately quantify the performance.…”

mentioning

confidence: 99%

See 4 more Smart Citations

SystemC/TLM Controller for Efficient NAND Flash Management in Electronic Musical Instruments

Conti

Caldari²,

Gianfelici

et al. 2018

Electronics

View full text Add to dashboard Cite

The design of an efficient memory subsystem is a fundamentally challenging task in the design of electronic equipment. The storage hierarchy chosen for a particular design has a significant impact on the overall performance and cost. Flash memory often contains the boot code, operating system kernel, device drivers, middleware, and other application-specific software that can result in megabytes of non-volatile stored data. To maximize the performance, data are moved from non-volatile memory to faster SDRAM (synchronous dynamic random-access memory). Non-volatile memory technologies reach a performance level close to that of dynamic RAMs with the additional benefit of persistent data storage. When cost is critical, an approach where the data are managed directly from non-volatile memory can be used. In this case the non-volatile memory subsystem is constantly accessed to retrieve data. The deep understanding of the system architecture is critical to identify any factor that affects memory performance and the resulting system performance; particularly in specific applications with stricter requests like streaming audio when more than one hundred data streams must be handled in a real-time environment and sound must be generated with a total latency of a few milliseconds. This article reports the development of the system-level model of a controller in a SystemC simulation environment capable of optimizing the use of NAND type flash memories for storage and playback of audio samples in real-time music applications, with the aim of reducing the quantity of the system SDRAM memory, thus lowering the cost of the final product, while still providing the most high-fidelity sound experience.

show abstract

Section: Memory Controller Architecturementioning

confidence: 99%

Section: Interleaving and Multi-channel Techniquesmentioning

confidence: 99%

mentioning

confidence: 99%

mentioning

confidence: 99%

mentioning

confidence: 99%

See 3 more Smart Citations

SystemC/TLM Controller for Efficient NAND Flash Management in Electronic Musical Instruments

Conti

Caldari²,

Gianfelici

et al. 2018

Electronics

View full text Add to dashboard Cite

show abstract

Simulations of RRAM-Based SSDs

Zuolo

Zambelli

Micheloni

et al. 2017

Solid-State-Drives (SSDs) Modeling

View full text Add to dashboard Cite

The Springer Series in Advanced Microelectronics provides systematic information on all the topics relevant for the design, processing, and manufacturing of microelectronic devices. The books, each prepared by leading researchers or engineers in their fields, cover the basic and advanced aspects of topics such as wafer processing, materials, device design, device technologies, circuit design, VLSI implementation, and sub-system technology. The series forms a bridge between physics and engineering, therefore the volumes will appeal to practicing engineers as well as research scientists.

show abstract