Stacked GaAs pHEMTs: Design of a K-band power amplifier and experimental characterization of mismatch effects

Fersch, Thomas; Quaglia, Roberto; Pirola, Marco; Camarchia, Vittorio; Ramella, Chiara; Khoshkholgh, A. Javan; Ghione, Giovanni; Weigel, Robert

doi:10.1109/mwsym.2015.7166762

Cited by 18 publications

(7 citation statements)

References 10 publications

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“…It was proved that, at such high frequency, this fork structure with underlying gate line is affected by a crosstalk so heavy that it completely hampers the stacking principle of operation. Alternative connection strategies do exist, such as the ones in References 13,16,and 17. The former is claimed to be less affected by crosstalk, as it relies on an asymmetric and unilateral drain‐to‐source connection, which requires no overlapping with the gate line of the CG stage.…”

Section: Stacked Cell Designmentioning

confidence: 99%

Evaluation of a stacked‐FET cell for high‐frequency applications (invited paper)

Piacibello

Costanzo

Giofrè

et al. 2021

Int J Numerical Modelling

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This paper presents the design, electromagnetic simulation strategies and experimental characterisation of a two‐stage stacked‐FET cell in a 100 nm GaN on Si technology around 18.8 GHz, suited for Ka band satellite downlink applications. A good agreement is found between the electromagnetic simulations and the measured performance on the manufactured prototype, thus demonstrating that a successful voltage combining architecture can be obtained in the frequency range of interest with the selected topology, based on a symmetric fork‐like connection between the transistors. This proves the effectiveness of an appropriate electromagnetic simulation set‐up in correctly predicting the crosstalk, which typically affects this structure, leading to a correct stacking operation.

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Section: Stacked Cell Designmentioning

confidence: 99%

Evaluation of a stacked‐FET cell for high‐frequency applications (invited paper)

Piacibello

Costanzo

Giofrè

et al. 2021

Int J Numerical Modelling

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“…Because the impedance matching ratio of the stacked FETs is two times smaller than that of a single FET, we can further reduce the chip size. The other advantage of using the 2 to 1 power combining scheme as compared to a triple stacked-FET in [2], [3] is that we can maintain high power added efficiency. The value of the gate resistor and capacitor are 1 Kohm and 0.3 pF, respectively.…”

Section: B Power Combining and Matching Networkmentioning

confidence: 99%

“…Stacked-FETs have been introduced primarily in Silicon complementary metal-oxide-semiconductor (Si CMOS) [1] to enhance the output power while very few GaAs stacked-FET PAs have been reported in literature. The works in [2] demonstrated a basic triple stacked-FET topology which achieved low gain. In [3], stacked-FET cells were employed in a single-stage PA at K-band along with Wikinson power combiners at the output.…”

Section: Introductionmentioning

confidence: 99%

An Ultra Compact Watt-Level Ka-Band Stacked-FET Power Amplifier

Nguyen

Pham

2016

IEEE Microw. Wireless Compon. Lett.

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“…Recent studies have demonstrated different realization forms of power amplifier MMICs for K-band transmitters, such as the 21-23 GHz GaN Doherty PA, 1 linear PAs, 2-3 and 18.5-24 GHz GaN on Si, GaN on SiC MMIC PA, 4 and a large number of GaAs MMIC PAs with different gate length processes. [5][6][7][8] In these studies, most of the MMIC designs are produced using a conventional design procedure and only consider the matching from a certain point of view, such as high efficiency or broadband. In this paper, an improved MN design procedure for MMIC PA capable of covering the entire downlink operating frequency band is proposed.…”

Section: Introductionmentioning

confidence: 99%

A 18‐23 GHz power amplifier design using approximate optimal impedance region approach for satellite downlink

Zhao

et al. 2021

Int J RF Microw Comput Aided Eng

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This paper presents the design procedure of a K-band 0.1 μm GaAs pseudomorphic high electron mobility transistors (pHEMT) monolithic microwave integrated circuit (MMIC) for satellite communication downlinks. The method focuses on the selection and design of the matching network (MN) by applying the Approximate Optimal Impedance Region (AOIR) approach which is a composition of simple mathematical constraints. The AOIR approach overcomes the drawbacks of traditional MN design method which cannot control the reflection coefficient trajectory of the MN precisely. The method formulates the constraints through symbolic-graphic combinations with integrated functions of computer-aided design (CAD) tools. The impedance transformation trajectory of MN is combined to reduce the mismatch and the insertion loss using equations with multiple mathematical constraints to realize the automatic selection of the MN's topology. The AOIR method fully considers the underutilized characteristics of power amplifier (PA) and to maximize its performance in a balanced manner. The MMIC, was designed using the proposed technique, operates in 18 GHz-23 GHz with a gain of 27 dB and has an average P −1 dB of 27 dBm and PAE of 38% under the continuous wave (CW) drive signal.

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Stacked GaAs pHEMTs: Design of a K-band power amplifier and experimental characterization of mismatch effects

Cited by 18 publications

References 10 publications

Evaluation of a stacked‐FET cell for high‐frequency applications (invited paper)

Evaluation of a stacked‐FET cell for high‐frequency applications (invited paper)

An Ultra Compact Watt-Level Ka-Band Stacked-FET Power Amplifier

A 18‐23 GHz power amplifier design using approximate optimal impedance region approach for satellite downlink

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