Standard CMOS active pixel image sensors for multimedia applications

Dickinson, Alexander; Ackland, B.; Eid, E.-S.; Inglis, D.; Fossum, Eric R.

doi:10.1109/arvlsi.1995.515622

Cited by 24 publications

(7 citation statements)

References 4 publications

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“…4. Among the latest developments in CMOS sensors, a CMOS sensor with differential operation mode (CMOS/DOM) has been reported [9]. The sensor is one of the active pixel sensors, and it has an onchip analog circuit for correlated double sampling in order to reduce fixed pattern noise.…”

Section: A Conditional Replenishmentmentioning

confidence: 99%

“…(The CMOS compatible image sensor is called CMOS sensor or active pixel sensor.) It has one or more active transistors in a pixel [6], [7], [9]. From the application point of view, one of the major advantages of a CMOS sensor is that it is suitable for integration with CMOS circuits that enable on-chip processing, while integration with CMOS circuits is not easy for CCD's.…”

Section: Introductionmentioning

confidence: 99%

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On sensor image compression

Aizawa¹,

Ohno

Egi

et al. 1997

IEEE Trans. Circuits Syst. Video Technol.

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In this paper, we propose a novel image sensor which compresses image signals on the sensor plane. Since an image signal is compressed on the sensor plane by making use of the parallel nature of image signals, the amount of signal read out from the sensor can be significantly reduced. Thus, the potential applications of the proposed sensor are high pixel rate cameras and processing systems which require very high speed imaging or very high resolution imaging. The very high bandwidth is the fundamental limitation to the feasibility of those high pixel rate sensors and processing systems.Conditional replenishment is employed for the compression algorithm. In each pixel, current pixel value is compared to that in the last replenished frame. The value and the address of the pixel are extracted and coded if the magnitude of the difference is greater than a threshold. Analog circuits have been designed for processing in each pixel. A first prototype of a VLSI chip has been fabricated. Some results of experiments obtained by using the first prototype are shown in this paper.Index Terms-Computational sensor, image compression, image sensor, intelligent sensor, vision chip.

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Section: A Conditional Replenishmentmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

On sensor image compression

Aizawa¹,

Ohno

Egi

et al. 1997

IEEE Trans. Circuits Syst. Video Technol.

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“…An alternative approach is a two-dimensional addressable array of sensors [5][6][7][8]. The architecture is similar to that used in conventional random-access memories.…”

Section: Cmos Sensorsmentioning

confidence: 99%

Video cameras: CMOS technology provides on‐chip processing

Loinaz

Ackland²

1999

Sensor Review

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Compares the relative merits of CCD and CMOS based video cameras. Describes the design and fabrication of CMOS sensors which include considerable hardware computational elements on the same chip as the sensor array. These enable the device to output picture information in a form that is directly compatible with multimedia PC application requirements. Electronic accessThe research register for this journal is available at http://www2.mcb.co.uk/mcbrr/sr.asp The current issue and full text archive of this journal is available at http://www.emerald-library.com IC producing 352 × 288 24b video at 30 frames/s", M. Loinaz et al., 1998 IEEE International Solid-State Circuits Conference, session 11, image sensors, paper FA 11.1, pp. 168-9. © IEEE

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“…Additionally, pixel-level processing allows the implementation of various preprocessing tasks like frame differencing [4] or edge detection [5] in a time and power efficient way.…”

Section: Introductionmentioning

confidence: 99%

Area and power reduction techniques for time-based image sensor pixel design

Matolin

Posch

Wohlgenannt

2009

2009 International Conference on Microelectronics - ICM

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This paper presents analytical considerations and practical thoughts leading to the design and implementation of a low power, small-area voltage comparator for pixel-level signal processing in time-based image sensors. The circuit is based on a standard two-stage operational amplifier topology and features an offset suppression technique to minimize the area requirements, a tunable hysteresis and a novel dynamic current control scheme to reduce power consumption. The circuit has been implemented in a QVGA asynchronous pixel array, fabricated in standard 0.18μm CMOS process. We present the circuit concept and design considerations aiming at minimum power consumption and silicon area. Measurements from the fabricated chip are shown and compared to results from theoretical groundwork.

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Standard CMOS active pixel image sensors for multimedia applications

Abstract: The task of image acquisition is completely dominated by CCD-based

Cited by 24 publications

References 4 publications

On sensor image compression

On sensor image compression

Video cameras: CMOS technology provides on‐chip processing

Area and power reduction techniques for time-based image sensor pixel design

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