Status and trends of power semiconductor device models for circuit simulation

Abstract

Abstract-The current status of research in the field of power semiconductor device models is reviewed. For this purpose, the basic modeling problems and research issues, which have to be overcome in this field, are discussed. Recently, some new and quite promising modeling concepts have been proposed, which are compared with more traditional ways of achieving an efficient tradeoff between the necessary accuracy, required simulation speed, and feasibility of parameter determination. From this comparison, a prediction of the future evolution of circuit simulation models for power semiconductor devices naturally emerges. Many of the different concepts are expected to survive only in an application niche, where their specific points of strength are important. However, three modeling concepts have already been proven to be successfully applicable to the complete spectrum of power semiconductor devices and have their strength for different grades of complexity of the power circuit. A revolutionary development from anticipated or longdue breakthroughs is on the other hand not expected in the foreseeable future.

Modeling and Simulation of Power MOSFET Using Orcad-Pspice

“…Gate oxide thickness and doping concentration of the channel can be used to control the V. Typically, 2~4V is designed for gate drive of 10-15V. With the scaling down of the CMOS technology [9][10][11], the gate drive of the power trench MOSFET drops to 2.5-4.5V. Therefore, lower threshold voltages of 2-5V are needed for these applications.…”

Failure-relevant abnormal events in power inverters considering measured IGBT module temperature inhomogeneities

“…Their basic electrical model, obtained from the manufacturer, is based on the work of Kraus et al [3]. It employs a mixed functional and physical description [4], representing a trade-off between a high accuracy of description and the ability to perform rather complex simulations, that is with multi-chip structures and including parasitic elements and temperature dependence. By contrast, to be representative of the behavior of the transistor during short-circuit conditions, the original model had to be modified in order to include shortchannel effects (i.e.…”

Effect of layout parasitics on the current distribution of power MOSFETs operated at high switching frequency

“…A complete and thorough review of power semiconductor device models has been proposed in [6] from which lumped models emerged as one of the most promising modelling concepts for power semiconductor devices. Indeed, they allow high flexibility and good trade-offs between accuracy and simulation time to be achieved.…”