Stochastic analysis of interconnect performance in the presence of process variations

Abstract

Deformations in interconnect due to process variations can lead to significant performance degradation in deep submicron circuits. Timing analyzers attempt to capture the effects of variation on delay with simplfied models. The timing verification of RC or RLC networks requires the substitution of such simplified models with spatial stochastic processes that capture the random nature of process variations. The present work proposes a new and viable method to compute the stochastic response of interconnects. The technique models the stochastic response in an infinite dimensional Hilbert space in terms of orthogonal polynomial expansions. A finite representation is obtained by using the Galerkin approach of minimizing the Hilbert space norm of the residual emr: The key advance of the proposed method is that itpmvides afunctional representation of the response of the system in terms of the random variables that represent the process variations. The proposed algorithm has been implemented in a procedure called OPERA. Results f " OPERA simulations on commercial design test cases match well with thosef" the classical Monte Carlo SPICE simulations and from perturbation methods. Additionally OPERA shows good computational eficiency: speedup factor of 60 has been observed over Monte Carlo SPICE simulations. IntroductionThe performance of integrated circuits (ICs) is increasingly less predictable as device dimensions shrink below the sub-100 nanometer scale. The modeling accuracy problem stems from poor control of the physical device and interconnect characteristics during the manufacturing process. Uncertainties due to variations in the manufacturing process are reflected in variations in the circuit parameters. Examples of manufacturing variations are the variations in materials,

ORION 2.0: A fast and accurate NoC power and area model for early-stage design space exploration

“…Wang et al [7] have used Hilbert-space and orthogonal polynomial expansions for stochastic analysis of interconnects. Nakagawa et al [8] have introduced models for dielectric thickness variation induced by pattern dependency of the chemical-mechanical polishing and metal width variation due to lithography bias.…”

“…Unlike the two parallel line case of M2 segment, M4 width variation affects maximum 23% which comes from the coupling increase of both sides, but M4 overlay error has 6 Impact of M1 coloring and overlay error are included in cell characterization, so M1 can be excluded in circuit level DOE. 7 Metal density is calculated from only signal nets. Maximum value is 50% when all routing tracks are used.…”

“…Finally, 26,069 instances (standard cells) are placed with 86% utilization and routed with average 10% (maximum 14%) metal density. 7 We extract GDS from the routed design and apply double patterning coloring to M1 to M5 layers. To shift and merge GDS files, we implement SKILL command scripts with Cadence Virtuoso Layout Design Environment IC6.1.0.243 [31].…”

Statistical Analysis of Power Grid Networks Considering Lognormal Leakage Current Variations with Spatial Correlation

“…The major benefit of this method is its compatibility with current transient simulation framework: it solves for some coefficients of the orthogonal polynomials, which can be done by using normal transient simulations of the original circuits with deterministic inputs to compute variances of node responses. Some existing approaches [7] model all the parameter variations as Gaussian (or approximate them as Gaussian variations by using firstorder Taylor expansion) [15]. Those methods also fail to consider the spatial correlation in the process parameter random variables.…”

“…Recently, a stochastic simulation method for interconnect and power grid networks has been proposed [7], [15]. This method is based on the orthogonal polynomial chaos expansion of random processes to represent and solve for the stochastic responses of linear systems.…”