Strain Engineering to Improve Data Retention Time in Nonvolatile Memory

Arghavani, Reza; Derhacobian, N.; Banthia, V.; Balseanu, Mihaela; Ingle, Nilesh P.; M’Saad, Hichem; Venkataraman, S.; Yieh, Ellie; Yuan, Zhibo; Xia, Li-Qun; Krivokapić, Zoran; Aghoram, Umamaheswari; MacWilliams, K.P.; Thompson, Scott E.

doi:10.1109/ted.2006.888827

Cited by 11 publications

(6 citation statements)

References 9 publications

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“…1,2 Uniaxial stress is also being used in nonvolatile memory ͑NVM͒ to improve the retention time. [3][4][5] In NVM, trap-assisted gate tunneling current can be a dominant factor in the retention time 6 and the reliability of the tunneling dielectric. 7,8 The high electric field during programing ͑Fowler-Nordheim tunneling͒ generates electron traps in the SiO 2 dielectric or at the SiO 2 / Si interface, resulting in trap-assisted gate tunneling.…”

Section: Impact Of Mechanical Stress On Direct and Trap-assisted Gatementioning

confidence: 99%

Impact of mechanical stress on direct and trap-assisted gate leakage currents in p-type silicon metal-oxide-semiconductor capacitors

Choi

Nishida

Thompson

2008

Applied Physics Letters

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Articles you may be interested inPlasma-assisted atomic layer deposition of TiN / Al 2 O 3 stacks for metal-oxide-semiconductor capacitor applications Lifetime-limited current in Cu-gate metal-oxide-semiconductor capacitors subjected to bias thermal stress J. Appl. Phys. 99, 034504 (2006); 10.1063/1.2168034 Quantum-mechanical study of the direct tunneling current in metal-oxide-semiconductor structures J. Appl. Phys. 98, 024506 (2005); 10.1063/1.1985976 Suppressed shot noise in trap-assisted tunneling of metal-oxide-semiconductor capacitors

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Section: Impact Of Mechanical Stress On Direct and Trap-assisted Gatementioning

confidence: 99%

Impact of mechanical stress on direct and trap-assisted gate leakage currents in p-type silicon metal-oxide-semiconductor capacitors

Choi

Nishida

Thompson

2008

Applied Physics Letters

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“…Figure 2͑a͒ depicts the normalized V th variation. 9 In conclusion, to minimize the initial charge loss, Si-rich film and thick interfacial layer must be avoided. If the long term charge loss follows a similar dynamics ͑similar slope between V th1h and V th24h ͒, the fast initial one varies from few percent up to 40%.…”

Section: Impact Of A-si X N Y : H Properties On Drmentioning

confidence: 99%

Contact etch stop a-SixNy:H layer: A key factor for single polysilicon flash memory data retention

Beylier

Benoit

Mora

et al. 2009

Journal of Vacuum Science &Amp; Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena

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Articles you may be interested inCharge trapping properties of the HfO 2 layer with various thicknesses for charge trap flash memory applications Appl. Phys. Lett. 96, 093506 (2010); 10.1063/1.3337103 Reliability of modified tunneling barriers for high performance nonvolatile charge trap flash memory application Appl. Phys. Lett. 96, 043503 (2010); 10.1063/1.3293291 Silicon-oxide-high-κ -oxide-silicon memory using a high-κ Y 2 O 3 nanocrystal film for flash memory application Analysis of electronic memory traps in the oxide-nitride-oxide structure of a polysilicon-oxide-nitride-oxidesemiconductor flash memory Appl. Phys. Lett. 92, 132104 (2008); 10.1063/1.2830000 Three-dimensional self-consistent simulation of the charging time response in silicon nanocrystal flash memoriesThe silicon nitride ͑a-Si x N y :H͒ contact etch stop layer strongly affects data retention performances in single polysilicon nonvolatile memories by acting on the initial charge loss phenomenon. Its improvement has required an analysis of influent plasma enhanced chemical vapor deposition process parameters through a design of experiment approach. The a-Si x N y : H physico-electrical analysis points out that silicon rich compositions especially of its interfacial layer must be avoided to reduce a-Si x N y : H charge amount and as a result to improve the data retention. Indeed, the a-Si x N y : H being near the floating gate, its charges modulation could act as a parasitic memory screening charges stored in the floating gate by capacitive effects.

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“…Typically, the charge trap/detrap due to the mobile ions and the change in the trap activation energy by stress have been referred as the main factors to influence the data retention characteristic [1][2][3][4][5]. Changes in Vt over a certain value induce the retention fails.…”

Section: Introductionmentioning

confidence: 99%

“…The followings are the sequence of measuring data retention on the full processed wafer: (1) Erase/Write (Program) cycling is applied on the wafer, (2) Initial Vt is measured, (3) Wafers are baked at elevated temperature for a certain time, (4) Final Vt is measured and the difference between final and initial Vt is called retention Vt shift. We could control the RI by N2O flow rate.…”

Section: Introductionmentioning

confidence: 99%

The Effect of Passivation SiON Layer on the Data Retention Reliability of NAND Flash

et al. 2009

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Data retention is one of the major device reliabilities of NAND Flash memory. We found that the lower Refractive Index (RI) of the Passivation Silicon Oxynitride (SiON) layer deposited by PECVD, the better data retention behavior was achieved. The hydrogen concentration and the stress analysis of the films are analyzed to find out which is more important in this case. Generally, when the RI of SiON decreases, both parameters also decrease, so it is impossible to find out which parameter is major factor of data retention. To analyze the effects of two parameters separately, we applied two conditions which had the same hydrogen concentration but quite different stress values. The final data retention levels are same in both conditions. In addition, even if the layer has the same hydrogen concentration, the retention characteristic is changed by how hydrogen is bonded in the film. In conclusion, the data retention characteristic can be explained by mobile ions generated by the hydrogen weakly bonded in PECVD SiON films in our experiment.

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Strain Engineering to Improve Data Retention Time in Nonvolatile Memory

Cited by 11 publications

References 9 publications

Impact of mechanical stress on direct and trap-assisted gate leakage currents in p-type silicon metal-oxide-semiconductor capacitors

Impact of mechanical stress on direct and trap-assisted gate leakage currents in p-type silicon metal-oxide-semiconductor capacitors

Contact etch stop a-SixNy:H layer: A key factor for single polysilicon flash memory data retention

The Effect of Passivation SiON Layer on the Data Retention Reliability of NAND Flash

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