Structural and electrical profiles for double damage layers in ion-implanted silicon

Sadana, D. K.; Fletcher, J.; Booker, G. R.

doi:10.1049/el:19770452

Cited by 18 publications

(5 citation statements)

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“…Upon annealing to effect SPEG, there are effectively two independent growth interfaces from which SPEG occurs. Defects can form when the two growth interfaces meet if the two interfaces are out of registry; these are often referred to as "clamshell" defects ( Jones et al, 1988;Masters et al, 1970;Sadana et al, 1977Sadana et al, , 1982. Figure 8A shows an on-axis BF-XTEM image of a (001) Si wafer Si + -implanted at 60 keV to a dose of 1.0 Â 10 15 cm À2 in the as-implanted state; an α-Si layer is $120 nm-thick is evident.…”

Section: "Buried" Amorphous Layersmentioning

confidence: 99%

“…However, depending on the characteristics of the SPEG process, it is typical for defects to be introduced into the crystallized layer. Furthermore, the presence of these defects in Si-based devices is often detrimental to performance (Ashburn et al, 1977;Bull et al, 1979;Finetti et al, 1979;Sadana et al, 1977). Thus, this work reviews the understanding of defects associated with the SPEG process in ion-implanted Si.…”

Section: Introductionmentioning

confidence: 99%

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Defective Solid-Phase Epitaxial Growth of Si

Rudawski¹,

Lind²,

Martin³

2015

Semiconductors and Semimetals

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Section: "Buried" Amorphous Layersmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Defective Solid-Phase Epitaxial Growth of Si

Rudawski¹,

Lind²,

Martin³

2015

Semiconductors and Semimetals

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“…However, the mobility profiles showed two pronounced dips at depths of 900A and 1700A respectively, corresponding to the deeper lying damage layers. LBL-1l3l9 (8) …”

Section: *Prepared For the Us Department Of Energy Undermentioning

confidence: 99%

Effect on electrical properties of segregation of implanted P+ at defect sites in Si

Sadana

Strathman

Washburn

et al. 1980

Applied Physics Letters

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The aim of this work was to study the furnace annealing behavior of buried amorphous layers formed due to P+ implantation into Si and to investigate the effects of annealing on the electrical properties of the implanted layer. For this purpose, P+ was implanted into (111) Si in a non-channeling direction at 120 KeV to a dose of 3 × 1014/cm2 at RT. The implanted samples were subsequently annealed at 750° C. 90° cross-sectional transmission electron microscopy (TEM), MeV He+ channeling, secondary-ion mass spectrometry (SIMS), and electrical results were obtained from the same specimen. The TEM results showed that the annealing at 750° C resulted in the formation of two discrete damage layers at depths of 600 and 1100Å. However, the MeV channeling measurement indicated the presence of three damage regions; the third region being beyond the second damage layer observed by TEM. The SIMS measurements showed pronounced ’’pileups’’ of phosphorus atoms at three damage regions. The carrier-concentration profile followed the atomic distribution curve. However, the mobility profile showed decreases only at the two deeper-lying regions.

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“…To m~ke valid comparisons, the latter measurments were perfonned on the adjacent regions of the same samples used for the TEM analyses. Strong correlations between ion damage, impurity, segregation, and electrical properties were observed [Sadana et al, 1977]. …”

Section: Introductionmentioning

confidence: 97%

Recrystallization of buried amorphous layers and associated electrical effects in P⁺-implanted Si

Sadana

Washburn

Booker

1982

Philosophical Magazine B

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Recrystallization behaviour of a buried ~morphous layer formed due top+ implantation into (111)Si has been studied using transmission electron microscopy (TEM), secondary ion mass spectroscopy (SIMS) and Hall measurements. Special TEM specimen preparation techniques were used to study individual sub-surface damage region~ in the as-implanted as well as the annealed samples. The TEM results showed that the recrystallization of the amorphous layer began slowly, increased rapidly above 550~C and was complete at 600°C. At temperatures ~750°C ~ 1000~C, two discrete layers of interstitial a/2 <110> and a/3 <111> dislocation loops formed below the specimen surface and the surface region contained stacking fault tetrahedra. The SIMS results showed ~hat pronounced segregation of phosphorus atoms occcurred in the defects rich regions at 750°C. At higher annealing temperatures, P segregation still occurred, but the magnitude of the segregation reduced because of the diffusive effects"(" The segregation results . '. correlated with the asymmetry in the inside/outside diffraction contrast results of the dislocation loops. The asymmetry was maximum in the 750YC annealed specimen and decreased progressively with increasing annealing temperature. Electrical profiles showed decreases in carrier concentration and/or mobility at the defects rich regions.r~

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Structural and electrical profiles for double damage layers in ion-implanted silicon

Cited by 18 publications

References 0 publications

Defective Solid-Phase Epitaxial Growth of Si

Defective Solid-Phase Epitaxial Growth of Si

Effect on electrical properties of segregation of implanted P+ at defect sites in Si

Recrystallization of buried amorphous layers and associated electrical effects in P⁺-implanted Si

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Structural and electrical profiles for double damage layers in ion-implanted silicon

Cited by 18 publications

References 0 publications

Defective Solid-Phase Epitaxial Growth of Si

Defective Solid-Phase Epitaxial Growth of Si

Effect on electrical properties of segregation of implanted P+ at defect sites in Si

Recrystallization of buried amorphous layers and associated electrical effects in P+-implanted Si

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Recrystallization of buried amorphous layers and associated electrical effects in P⁺-implanted Si