Structure and adjustment of a novel write-precompensation scheme

Bergmans, J.W.M.; Voorman, J.O.; Wong-Lam, H.W.

doi:10.1109/20.764910

Cited by 5 publications

(4 citation statements)

References 13 publications

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“…As a result, even with jitter and with imperfect knowledge of , it is generally possible to unambiguously measure the run length (i.e., the number of identical symbols) between any two successive transition instants and , for example, by rounding to the nearest integer. 1 In this manner, we can determine the total number of symbols between the first and last transition instants and . The reference time base is established by splitting the interval between and up into equal portions.…”

Section: B Determination Of Andmentioning

confidence: 99%

“…Its nominal output, may be written (3) where denotes the nominal displacement sequence. Displacements are a deterministic yet nonlinear function of "surrounding" bits, often according to (4) Here, denotes linear convolution and is an impulse response having [1]. Other coefficients are all positive, yet only and (for to 4) tend to be significant.…”

Section: System Model and Nomenclaturementioning

confidence: 99%

“…We first consider the situation without write-precompensation circuit. Here, a binary write signal is nominally obtained from according to (1) where denotes the unit step function (i.e., for and for ). Transitions of all occur on the -spaced grid , Z Z.…”

Section: System Model and Nomenclaturementioning

confidence: 99%

“…Key causes for these nonlinearities are bandwidth limitations of the write path and demagnetizing fields in the recording medium [1]. Write-precompensation schemes are widely used to counteract these nonlinearities [2]- [5].…”

Section: Introductionmentioning

confidence: 99%

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Adaptive characterization of write-precompensation circuits

Bergmans

2003

IEEE Trans. Magn.

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Abstract-Write-precompensation circuits are widely used in digital magnetic recording systems to counteract nonlinearities in the recording process. They act to shift transitions in the binary write signal in nonlinear dependence on neighboring bits. This paper develops a general and accurate technique for assessing the quality of these circuits. The technique permits joint assessment of the actual transition shifts introduced by the circuits and of data-dependent, periodic, and random jitter of the transitions. The action of a phase-locked loop (PLL) can be mimicked so as to characterize only the harmful portion of the jitter, namely the portion that is left behind by the PLL. Experimental results for a fifth-order write-precompensation circuit illustrate the merits of the technique.

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Section: B Determination Of Andmentioning

confidence: 99%