Structured analysis and VHDL in embedded ASIC design and verification

Tikkanen, T.; Leppanen, T.; Kivela, J.

doi:10.1109/edac.1990.136629

Cited by 8 publications

(1 citation statement)

References 2 publications

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“…Several translation schemes have been published for translating a variety of speci cation languages to VHDL 8,9,10,11,12,13,14]. These languages support a very di erent model than SpecCharts or support only a subset of the embedded-system characteristics outlined in Section 2.…”

Section: Vhdl Translation Algorithmmentioning

confidence: 99%

SpecCharts: a VHDL front-end for embedded systems

Vahid

Narayan²,

Gajski³

1995

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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VHDL and other hardware description languages are commonly used as speci cation languages during system design. However, the underlying model of those languages does not directly support the speci cation of embedded systems, making the task of specifying such systems tedious and errorprone. We introduce a new conceptual model, called Program-State Machines (PSM), that caters to embedded systems. We describe SpecCharts, a VHDL extension that supports capture of the PSM model. The extensions we describe can also be applied to other languages. SpecCharts can be easily incorporated into a VHDL design environment using automatic translation to VHDL. We highlight several experiments that demonstrate the advantages of signi cantly reduced speci cation time, fewer errors, and improved speci cation readability.

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Section: Vhdl Translation Algorithmmentioning

confidence: 99%

SpecCharts: a VHDL front-end for embedded systems

Vahid

Narayan²,

Gajski³

1995

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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High level software engineering environments in high level synthesis of ASICs

Israel

Facon

Benzakki

et al.

[1991] Proceedings, Advanced Computer Technology, Reliable Systems and Applications

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As VLSI devices become more complex, new methods are needed especially for specifying and verifying the design at high level. The ability of prototyping at high level reduces the time of debugging at lower levels. Structured design methodologies that include hierarchical decomposition, coherent manipulation of different circuit abstractions (views) and technology independence are common requirements. Similarly as in software design, the designer's productivity and the quality of the design depends on the quality of the design environment. As for software applications, it should not require detailed knowledge of the technological process. Todays' tools have reached out the system designer and have moved from a set of different tools to integrated design environments. We will present the use of a software engineering tool: the programming environment generator CENTAUR in high level synthesis of integrated circuits.

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