2019
DOI: 10.1109/tdmr.2019.2916721
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Study and Verification on the Latch-Up Path Between I/O pMOS and N-Type Decoupling Capacitors in 0.18-$\mu$ m CMOS Technology

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Cited by 9 publications
(1 citation statement)
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“…Since such a large number of diodes occupies a large area of the IC and lacks resistance to heat generated to handle the ESD current, the diodes are damaged and it is difficult to secure ESD tolerance characteristics. Therefore, by embedding the proposed ESD protection circuit instead of a diode, it is possible to secure not only area efficiency but also high robustness for ESD due to high driving capability [10,31,32] Figure 3 shows the dynamic current driving structure when the load current increases rapidly. A dynamic current driving structure senses the feedback voltage because the feedback voltage is sensitive to variations in the load current.…”
Section: Introductionmentioning
confidence: 99%
“…Since such a large number of diodes occupies a large area of the IC and lacks resistance to heat generated to handle the ESD current, the diodes are damaged and it is difficult to secure ESD tolerance characteristics. Therefore, by embedding the proposed ESD protection circuit instead of a diode, it is possible to secure not only area efficiency but also high robustness for ESD due to high driving capability [10,31,32] Figure 3 shows the dynamic current driving structure when the load current increases rapidly. A dynamic current driving structure senses the feedback voltage because the feedback voltage is sensitive to variations in the load current.…”
Section: Introductionmentioning
confidence: 99%