Study of symmetric microstructures for CMOS multilayer residual stress

Huang, Ying Jui; Chang, Tien-Li; Chou, H.P.

doi:10.1016/j.sna.2009.01.012

Cited by 11 publications

(7 citation statements)

References 18 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…After a gas annealing (N 2 ) process at 450°C, to achieve a low contact resistance between Al and polysilicon, 500-nm Si 3 N 4 and 900-nm SiO 2 of sandwich passivation were subsequently carried out to realize the symmetric multilayer microstructure for high mechanical stability. 12 After pads and etching windows for structure release (Figure 1(e)) were opened by the reactive ion etching (RIE) process, the silicon substrate beneath the integrated thermopile vacuum gauge was removed by XeF 2 gas through etching windows in the front side, as shown in Figure 1(f). After XeF 2 dry etching, a cavity under the membrane was formed for thermal isolation.…”

Section: Fabricationmentioning

confidence: 99%

Integrated thermopile vacuum gauge with an XeF₂ dry-etching process

Sun

Xiong

et al. 2013

Proceedings of the Institution of Mechanical Engineers, Part N:

View full text Add to dashboard Cite

In this article, an integrated thermopile vacuum gauge with an XeF 2 dry-etching process is presented. The integrated thermopile vacuum gauge consists of an N-polysilicon heater and 38 N-polysilicon/Al thermocouples. By using XeF 2 front-side isotropic post-etching technique, the integrated vacuum gauge structure was released, and a small size of the integrated thermopile vacuum gauge structure about 0.4 3 1.5 mm 2 has been achieved. Compared with applying a constant voltage to the integrated thermopile vacuum gauge, applying a constant power to the gauge is more sensitive. The experimental results show that the dynamic pressure range of the integrated thermopile vacuum sensor is 10 22-10 5 Pa.

show abstract

Section: Fabricationmentioning

confidence: 99%

Integrated thermopile vacuum gauge with an XeF₂ dry-etching process

Sun

Xiong

et al. 2013

Proceedings of the Institution of Mechanical Engineers, Part N:

View full text Add to dashboard Cite

show abstract

“…In order to realize the thermocouple and interconnection, a 500 nm thick Al-0.5%Si film was deposited by sputtering and the Al-0.5%Si layer was patterned by wet etching using a phosphoric acid solution (figure 5(d)). After a gas annealing (N 2 ) process at 450 • C to achieve a low contact resistance between Al and polysilicon, 500 nm PECVD Si 3 N 4 and 900 nm PECVD SiO 2 sandwich passivation were subsequently carried out to implement the absorber and realize the symmetric multilayer microstructure for high mechanical stability [19]. Then, pad opening and etching window opening were performed.…”

Section: Device Fabricationmentioning

confidence: 99%

Design, fabrication and characterization of a front-etched micromachined thermopile for IR detection

Xiong

Wang

2010

J. Micromech. Microeng.

View full text Add to dashboard Cite

This paper presents the design, fabrication and experimental results of a front-etched CMOS compatible micromachined thermopile IR detector. The N-polysilicon/Al thermocouples were embedded in a 2.5 μm thick SiO 2 -Si 3 N 4 -SiO 2 sandwich membrane, and XeF 2 front-side isotropic post-etching was adopted to release and thermally isolate the thermopile structure. Due to the isotropy of XeF 2 etching, a lot of flexibility was allowed in etching window layout and thermopile structure design. Etching windows in the dielectric absorber area were designed to avoid cutting off the heat transfer path from the absorber to hot junctions, and aluminum strips were patterned in the absorber to ensure the temperature was uniform across the absorber area. Two different thermopile structures, circle and rectangle, were designed and fabricated to investigate detector performance with respect to the thermopile structure. The steady-state behavior of fabricated detectors was anticipated by thermal ANSYS simulation. Due to the fact that the circular structure can get a higher temperature difference between hot and cold junctions, the circular thermopile detector has a quicker response, two times higher responsivity and detectivity than the rectangular thermopile detector. The circular thermopile detector exhibits a responsivity of 102.0 V W −1 , a detectivity of 9.2 × 10 7 cm Hz 1/2 W −1 and a time constant of 16.8 ms, in air at room temperature.

show abstract

“…Moreover, various mature CMOS processes are available in existing IC foundries. In many applications, the MEMS structures fabricated by such CMOS MEMS processes are stacks of metal and dielectric composite films [3][4][5]. Thus, the suspended MEMS structures will be deformed by the thin film residual stresses after being released from the substrate [3,4].…”

Section: Introductionmentioning

confidence: 99%

Determining the thermal expansion coefficient of thin films for a CMOS MEMS process using test cantilevers

Cheng

Tsai

Fang

2015

J. Micromech. Microeng.

View full text Add to dashboard Cite

Many standard CMOS processes, provided by existing foundries, are available. These standard CMOS processes, with stacking of various metal and dielectric layers, have been extensively applied in integrated circuits as well as micro-electromechanical systems (MEMS). It is of importance to determine the material properties of the metal and dielectric films to predict the performance and reliability of micro devices. This study employs an existing approach to determine the coefficients of thermal expansion (CTEs) of metal and dielectric films for standard CMOS processes. Test cantilevers with different stacking of metal and dielectric layers for standard CMOS processes have been designed and implemented. The CTEs of standard CMOS films can be determined from measurements of the out-of-plane thermal deformations of the test cantilevers. To demonstrate the feasibility of the present approach, thin films prepared by the Taiwan Semiconductor Manufacture Company 0.35 μm 2P4M CMOS process are characterized. Eight test cantilevers with different stacking of CMOS layers and an auxiliary Si cantilever on a SOI wafer are fabricated. The equivalent elastic moduli and CTEs of the CMOS thin films including the metal and dielectric layers are determined, respectively, from the resonant frequency and static thermal deformation of the test cantilevers. Moreover, thermal deformations of cantilevers with stacked layers different to those of the test beams have been employed to verify the measured CTEs and elastic moduli.

show abstract

Study of symmetric microstructures for CMOS multilayer residual stress

Cited by 11 publications

References 18 publications

Integrated thermopile vacuum gauge with an XeF₂ dry-etching process

Integrated thermopile vacuum gauge with an XeF₂ dry-etching process

Design, fabrication and characterization of a front-etched micromachined thermopile for IR detection

Determining the thermal expansion coefficient of thin films for a CMOS MEMS process using test cantilevers

Contact Info

Product

Resources

About

Study of symmetric microstructures for CMOS multilayer residual stress

Cited by 11 publications

References 18 publications

Integrated thermopile vacuum gauge with an XeF2 dry-etching process

Integrated thermopile vacuum gauge with an XeF2 dry-etching process

Design, fabrication and characterization of a front-etched micromachined thermopile for IR detection

Determining the thermal expansion coefficient of thin films for a CMOS MEMS process using test cantilevers

Contact Info

Product

Resources

About

Integrated thermopile vacuum gauge with an XeF₂ dry-etching process

Integrated thermopile vacuum gauge with an XeF₂ dry-etching process