Study on TSV with new filling method and alloy for advanced 3D-SiP

Tsukada, Akihiro; Sato, Ryohei; Sekine, Satoshi; Kimura, Ryuji; Kishi, Keijiroh; Sato, Yukihiro; Iwata, Yoshiharu; Murata, Hidenori

doi:10.1109/ectc.2011.5898788

Cited by 16 publications

(5 citation statements)

References 5 publications

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“…To overcome such disadvantages of the TSV formation by Cu electroplating, various high-speed TSV processes have been proposed not only by filling with conductive paste, 13) but also by utilizing pressure infiltration or vacuum suction of molten metals. 4,7,14,15) However, details of via-filling behavior have not been reported in the previous works for TSV formation by pressure infiltration of SnZn and BiSnAg alloys. 4,14) Although the diameter of TSVs for signal propagation does not need to be as large as the diameter of TSVs for power transmission in a 3D package, 1) formation of TSVs with different diameters at once by Cu electroplating would be very difficult in reality.…”

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confidence: 91%

“…4,7,14,15) However, details of via-filling behavior have not been reported in the previous works for TSV formation by pressure infiltration of SnZn and BiSnAg alloys. 4,14) Although the diameter of TSVs for signal propagation does not need to be as large as the diameter of TSVs for power transmission in a 3D package, 1) formation of TSVs with different diameters at once by Cu electroplating would be very difficult in reality.…”

Section: )mentioning

confidence: 91%

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Formation of Through-Silicon-Vias Using Pressure Infiltration of Molten Tin

Kim

2012

Mater. Trans.

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Formation of through-silicon-via (TSV) was examined by pressure infiltration of molten Sn into Si via-holes with variations of the infiltration pressure, infiltration time and via-hole size. Contrary to the conventional Cu TSV process which requires complicate and long Cu electroplating, the method using pressure infiltration of molten Sn is fast enough to complete via-filling within 5 s regardless of the via-hole size. The ratio of the unfilled volume to the initial volume of a via-hole versus the external infiltration pressure well satisfied the Boyle's law. TSVs of different diameters in a wide range of 10200 µm could be easily formed at once by infiltration of molten Sn at an external pressure of 4 MPa for 5 s.

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confidence: 91%

Section: )mentioning

confidence: 91%

Formation of Through-Silicon-Vias Using Pressure Infiltration of Molten Tin

Kim

2012

Mater. Trans.

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“…Parylene was used to substitute SiO 2 as dielectric layer to relax stress [11]. BiSnAg with more suitable material properties was proposed to substitute copper, and demonstrated significant lower thermal stress [12,13]. In this paper, a novel TSV structure was proposed to optimize the thermal stress distribution.…”

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confidence: 99%

Analysis of thermal stress distribution for TSV with novel structure

Feng

Watanabe

Shimamoto

et al. 2014

2014 International 3D Systems Integration Conference (3DIC)

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Through Silicon Via (TSV) plays a key role in accomplishing 3D IC integration. In most common approaches, TSV is filled with copper. Due to large mismatch in Coefficients of Thermal Expansion (CTE) between the copper via and the silicon of TSV, significant thermal stresses will be induced at the interfaces of Cu/dielectric layer (usually SiO 2 ) and dielectric layer/Si, which would lead to various reliability and electrical performance issues. As a solution, a novel structure TSV (Annular-Trench-Isolated TSV: ATI TSV) was proposed to optimize the thermal stress distribution. A ring of Si is remained between Cu and SiO 2 during print process. The better thermal properties of ATI TSV was revealed by Finite Element Method simulation. The thermal stress level of ATI TSV is compared to most common cylindrical TSV (regular TSV) and annular TSV. Due to the large CTE mismatch between copper and silicon, the stress is concentrated at the interface of Cu/Si inside TSV under thermal load. In case of 5 m TSV diameter, thermal stress with level of less than 30 MPa is achieved in silicon substrate of ATI TSV with 80% reduction comparing to regular TSV. The silicon ring thickness is constant as 1 m in this study. With downsizing TSV diameter, the volume ratio of silicon ring to copper core increases. Therefore, the effect of stress concentration at the interface of Cu/Si inside TSV enhanced with TSV scaling down. Further reducation of stress in silicon substrate can be achieved by thicken silicon ring in ATI TSV.

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“…이것은 Schematics of fabrication process of SiCembedded solder cluster 기존의 구리 전해도금 방식에 의한 비아 충전시 긴 공 정 시간에 따른 것이다. 따라서 이러한 한계를 극복하 기 위하여 용융 금속 충전 방법이 소개되었다[4][5][6] . 용융 금속 충전 방법은 용융된 금속을 가압 또는 진공에 의…”

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Development of SiC Composite Solder with Low CTE as Filling Material for Molten Metal TSV Filling

Ko¹,

Ko²,

Bang³

et al. 2014

Journal of Welding and Joining

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Among through silicon via (TSV) technologies, for replacing Cu filling method, the method of molten solder filling has been proposed to reduce filling cost and filling time. However, because Sn alloy which has a high coefficient of thermal expansion (CTE) than Cu, CTE mismatch between Si and molten solder induced higher thermal stress than Cu filling method. This thermal stress can deteriorate reliability of TSV by forming defects like void, crack and so on. Therefore, we fabricated SiC composite filling material which had a low CTE for reducing thermal stress in TSV. To add SiC nano particles to molten solder, ball-typed SiC clusters, which were formed with Sn powders and SiC nano particles by ball mill process, put into molten Sn and then, nano particle-dispersed SiC composite filling material was produced. In the case of 1 wt.% of SiC particle, the CTE showed a lowest value which was a 14.8ppm/℃and this value was lower than CTE of Cu. Up to 1 wt.% of SiC particle, Young's modulus increased as wt.% of SiC particle increased. And also, we observed cross-sectioned TSV which was filled with 1 wt.% of SiC particle and we confirmed a possibility of SiC composite material as a TSV filling material.

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Study on TSV with new filling method and alloy for advanced 3D-SiP

Cited by 16 publications

References 5 publications

Formation of Through-Silicon-Vias Using Pressure Infiltration of Molten Tin

Formation of Through-Silicon-Vias Using Pressure Infiltration of Molten Tin

Analysis of thermal stress distribution for TSV with novel structure

Development of SiC Composite Solder with Low CTE as Filling Material for Molten Metal TSV Filling

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