Sub-1V bootstrapped CMOS driver for giga-scale-integrationera

Law, Chong-Fatt; Yeo, Kiat Seng; Rofail, S.S.

doi:10.1049/el:19990248

Cited by 23 publications

(4 citation statements)

References 2 publications

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“…This sub-1 V CMOS large load driver circuit using the direct bootstrap technique can still be advantageous at a power supply voltage of 0.8 V. performance in Multiply and Accumulate (MAC) intensive algorithms. However, field programmable logic (FLL) devices [2] offer the flexibility of a programmable solution and the performance of custom VLSI chips, thus enabling system integration on a single chip. In this Letter, RNS arithmetic is used to design and synthesise a high performance processor suitable for a variety of DSP applications in order to explore the possibilities of RNS for general-purpose DSP applications.…”

Section: Discussionmentioning

confidence: 99%

Sub-1 V CMOS large capacitive-load driver circuit using direct bootstrap technique for low-voltage CMOS VLSI

Kuo

Chen

2002

Electron. Lett.

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A novel sub-l V CMOS large capacitive-load driver circuit using a direct bootstrap technique for low-voltage CMOS VLSI is reported. For a supply voltage of 1 V, the CMOS large capacitive-load driver circuit using the direct bootstrap technique shows a 3.3 times improvement in switching speed in driving a capacitive load of 2 pF compared to the conventional bootstrapped CMOS driver circuit using an indirect bootstrap technique. Even for a supply voltage of 0.8 V, this CMOS large capacitive load driver circuit using the direct bootstrap technique is still advantageous.

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Section: Discussionmentioning

confidence: 99%

Sub-1 V CMOS large capacitive-load driver circuit using direct bootstrap technique for low-voltage CMOS VLSI

Kuo

Chen

2002

Electron. Lett.

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“…As we know the design of the driver circuit is the major step in determining the speed performance of a CMOS VLSI circuit with a large capacitive load. To raise and to lower the gate voltage of the output NMOS and PMOS device indirect bootstrap techniques is mainly used in the large load driver circuit using a low power supply voltage [3][4][5]. In indirect bootstrap technique, the bootstrap technique is applied at the gate of the output devices in a driver circuit.…”

Section: Introductionmentioning

confidence: 99%

Design and Analysis of a Low Power Bootstrapped Cmos Circuit

Bharaj¹

2016

IJRET

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This paper describes bootstrapped circuit operated at low voltage. First I have described bootstrapped driver circuit that operated at ultra low supply voltage. Bootstrapping is a technique that improves the driving ability of digital circuit that operated on very low voltage. In this paper I have proposed bootstrapped driver circuit using CADENCE virtuoso at 180nm as well as 90nm and comparison of both circuit are mentioned and also layout of proposed bootstrapped driver circuit is also shown. The proposed bootstrapped driver circuit minimizes area overhead as compared to conventional bootstrapped driver circuit. Proposed driver circuit uses less number of transistors as compared to conventional driver circuit. Conventional bootstrapped driver circuit operated at 1v to 1.5v, if we try to reduce that supply voltage for low power application then actual working of driver circuit get disturbed at 180nm. The circuit which I have proposed at 180nm takes minimum supply voltage of 0.8v and proposed driver circuit at 90nm take minimum supply voltage of 0.3v. Final output voltage of bootstrapped driver circuit will be boosted output that is above VDD and below GND. Both proposed bootstrapped driver circuit give low power dissipation and less leakage current and also less delay as compared to conventional bootstrapped driver circuit. Proposed bootstrapped driver circuit offers 94.93% improvement in power dissipation.

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“…The operation of this CMOS CAB load driver circuit is divided into two modes-when V IN is low (1) and high (2). When V IN is low (1), the pull-down segment is inactivated except that the bootstrap capacitor C B2 is charged with its left side to high and right side to 0V, since N1 is on.…”

Section: Cab Load Drivermentioning

confidence: 99%

“…Large-load driver circuit is an important component in a modern TFT-LCD system, where high speed and low power are the goals [1]. Bootstrap technique has been used in the low-voltage driver circuits to enhance speed performance of a VLSI system [2]- [4]. Energy efficiency of a large-load driver circuit is important in determining the power consumption of a TFT-LCD system.…”

Section: Introductionmentioning

confidence: 99%

Energy-Efficient CMOS Large-Load Driver Circuit with the Complementary Adiabatic/Bootstrap (CAB) Technique for Low-Power TFT-LCD System Applications

Liu

Wang

Kuo³

2005 IEEE International Symposium on Circuits and Systems

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This paper reports an energyefficient CMOS large-load driver circuit with the complementary adiabatic/bootstrap (CAB) technique for low-power TFT-LCD system applications. Using two differential inputs and via dual paths for bootstrap and energy recovery to V DD /ground, this CAB load driver with an output load of 30pF and operating at 5V, provides a high-speed performance, consuming 60% less power as compared to the adiabatic/bootstrapped driver with single-path for bootstrap and energy recovery.

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Sub-1V bootstrapped CMOS driver for giga-scale-integrationera

Cited by 23 publications

References 2 publications

Sub-1 V CMOS large capacitive-load driver circuit using direct bootstrap technique for low-voltage CMOS VLSI

Sub-1 V CMOS large capacitive-load driver circuit using direct bootstrap technique for low-voltage CMOS VLSI

Design and Analysis of a Low Power Bootstrapped Cmos Circuit

Energy-Efficient CMOS Large-Load Driver Circuit with the Complementary Adiabatic/Bootstrap (CAB) Technique for Low-Power TFT-LCD System Applications

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