A printed circuit board (PCB) consists of multiple layers of dielectric material and current-carrying metal traces and vias. Performing system-level simulations of PCBs with detailed trace and via geometries is very costly, the present approach considers the effects of the trace and via geometry in the physical model by importing Electronic Computer Aided Design (ECAD) data comprising the trace and via layout of the board and determines spatially varying orthotropic conductivity (k x , k y , and k z ) on the PCB based on the ECAD data. In addition, the present approach considers the effects of joule heating in the current-carrying traces by utilizing multiple 2-D sources where the powermap is determined by solving the governing dc electric field equations on the trace. In this paper, the effects of both the trace layer orthotropic thermal conductivity and joule heating are studied on a sample PCB. Comparisons are made with earlier studies and conventional models when possible. It is shown that the location of the hot spots and temperature values differ substantially if different methods are used.