We have designed and implemented an SFQ programmable clock generator (PCG), which can generate variable length of SFQ pulses according to its internal state. PCG is composed of an SFQ ring oscillator, a control circuit, which counts up the number of SFQ pulses and stops the operation of the ring oscillator, and a decoder, which defines the initial state of the control circuit. PCG can generate the variable number of SFQ pulses ranging 2 ~ 2 N bits, where N is the number of T flip-flop in the control circuit. The oscillation frequency of PCG is designed to be ranging from 6.2 GHz to 18.8 GHz. In this study, we have implemented PCG generating SFQ pulses ranging 2 ~ 2 4 bit using a cell-based design methodology and confirmed its correct functionality.