2020
DOI: 10.1109/jeds.2020.3011929
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Superjunction LDMOS With Dual Gate for Low On-Resistance and High Transconductance

Abstract: In this paper, a novel bulk silicon lateral superjunction double diffused MOSFET (SJ-LDMOS) with dual gate (DG) is proposed and its mechanism is investigated by numerical TCAD simulations. The proposed structure features the combination of a trench gate and a planar gate, forming two current conduction paths. One current conduction takes place along the highly doped N-pillar. The other is through the N-buffer layer ensuring uniform current distributions, which solves the problem of low conduction in the N-buff… Show more

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Cited by 14 publications
(4 citation statements)
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References 27 publications
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“…Fundamental properties of materials can be translated into device-level figures of merit (FOMs). The comparison of novel devices fabricated after 2015 (Silicon Super-Junctions MOSFETS [25], 4H-SiC MOSFETs [26] and GaN FETs [27]) with ideal limits based on one-dimensional p-n junctions [28] is useful to estimate the maturity of each technology and to evaluate the available room for improvement. For instance, the parameters related to high voltage operation and resistive power loss are well captured by the so-called Baliga FOM (B FOM ) [28], which is essentially a normalized breakdown voltage at on-state resistance parity for a unipolar device based on one-dimensional electrostatics.…”
Section: B Maturity Of Wbg Materials Technologiesmentioning
confidence: 99%
See 1 more Smart Citation
“…Fundamental properties of materials can be translated into device-level figures of merit (FOMs). The comparison of novel devices fabricated after 2015 (Silicon Super-Junctions MOSFETS [25], 4H-SiC MOSFETs [26] and GaN FETs [27]) with ideal limits based on one-dimensional p-n junctions [28] is useful to estimate the maturity of each technology and to evaluate the available room for improvement. For instance, the parameters related to high voltage operation and resistive power loss are well captured by the so-called Baliga FOM (B FOM ) [28], which is essentially a normalized breakdown voltage at on-state resistance parity for a unipolar device based on one-dimensional electrostatics.…”
Section: B Maturity Of Wbg Materials Technologiesmentioning
confidence: 99%
“…Commercial silicon devices already reach the socalled limit and, some specific device architectures such as super-junction (SJ) MOSFETs actually can surpass the "silicon limit" [25], [29], [30], because they exploit sophisticated three-dimensional electrostatics engineering, whereas the Baliga FOM is based on the assumption of basic one-dimensional p-n junctions. SiC is not far from the limit, but still has some room for improvement.…”
Section: B Maturity Of Wbg Materials Technologiesmentioning
confidence: 99%
“…In literature, various device designs to improve RON and gm such as dual-gate, source-underlap, and adaptive RESURF and hybrid source techniques have been reported [26]- [28]. However, an in-depth understanding of the fundamental physics involved towards the onset of SCM as well as QS in the multiple RESURF (double, and triple) devices is rather limited.…”
Section: Introductionmentioning
confidence: 99%
“…Fig.12compares the dynamic performance of the P/N SSTG SOI LDMOS and TG SOI LDMOS. The inset shows the switching circuit used in the simulation[22,23]. It can be seen from the gure that P/N SSTG SOI LDMOS has a faster turn-off speed.…”
mentioning
confidence: 99%