Suppression of ambipolarity in tunnel‐FETs using gate oxide as parameter: analysis and investigation

Ahmad, Syed Afzal; Alam, Naushad

doi:10.1049/iet-cds.2019.0053

Cited by 9 publications

(3 citation statements)

References 25 publications

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“…Besides the low I ON , the circuit application of TFET also faces challenges from the ambipolar current arising due to conductance in both the polarity of gate voltage, which requires suppression in order to demonstrate unipolar behaviour. Several studies have contributed towards TFET architectures that offer a significantly reduced ambipolar current [18][19][20][21][22].…”

Section: Introductionmentioning

confidence: 99%

Suppression of P-I-N forward leakage current in tunnel field-effect transistor

Ahmad¹,

Alam

Ahmad³

2023

Semicond. Sci. Technol.

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In this paper, we propose an architecture of Tunnel Field Effect Transistor (TFET) for suppression of the P-I-N forward leakage current. P-I-N forward leakage current is attributed to drift-diffusion mechanism under the forward bias condition; thereby gate loses all itscontrol over channel. In the proposed device architecture, source region bifurcated into sub-regions (referred to as P+ and P++) with different p-type doping concentrations. We haveintroduced electrostatic source (ES) electrode over oxide which encapsulates the low doped(P+) source region. ES is shorted to source electrode which means if the voltage at source terminal becomes positive, ES also turns positive causing decrement in P+ characteristics inthe source region. On the other hand, increment in voltage, P+ source region starts to become intrinsic region thus minimizing the chances of P-I-N diode getting forward biased. In the proposed device architecture along with variation of ES (Electrostatic Source) work function,P-I-N forward leakage current has been suppressed by 3 to 6 orders of magnitude at the cost of ON state current loss of 3 to 10 fold of magnitude. Considering the detrimental impact of P-I-N forward leakage current in circuits, this small penalty on the part of ON state current is worth accepting for significant reduction in parasitic P-I-N forward leakage current. We believe that the proposed technique will pave way for wide spread use of TFET in logic circuits.

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Section: Introductionmentioning

confidence: 99%

Suppression of P-I-N forward leakage current in tunnel field-effect transistor

Ahmad¹,

Alam

Ahmad³

2023

Semicond. Sci. Technol.

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“…To address the issue of limited ON-state current, many concepts like strained-Si, heterostructure TFET and pocket doping have been suggested in the literature [22][23][24][25][26]. Also to resolve the issue of ambipolar conduction several approaches such as: use of heterogeneous gate dielectric, various doping profile in the drain region, large band gap material on the drain side and dual-material doublesource T-shaped TFET, have been proposed by the researchers [27][28][29][30]. Although the above-mentioned approaches were found to limit the ambipolar conduction, they lead to reduction in the I ON and increase in the drain series resistance.…”

Section: Introductionmentioning

confidence: 99%

Temperature dependence of analogue/RF performance, linearity and harmonic distortion for dual‐material gate‐oxide‐stack double‐gate TFET

Kumar

2021

IET Circuits, Devices & Syst

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This article presents an investigation report of the effects of temperature variation in the range of 300 to 480 K on electrical performance parameters of conventional dualmaterial double-gate tunnel field effect transistor (DMDG-TFET) and dual-material gateoxide-stack double-gate tunnel field effect transistor (DMGOSDG-TFET). This report shows an analysis and comparison of the impacts of operating temperature variation on both the devices in terms of DC, analogue/RF, linearity and harmonic distortion parameters with the help of simulation results obtained using a numerical device simulator. It could be stated that DMGOSDG-TFET is more insensitive with respect to temperature variation in terms of DC, analogue/RF and linearity performances as compared to conventional DMDG-TFET. Moreover, in terms of harmonic distortion characteristics DMGOSDG-TFET is found to be more stable with temperature variation as compared to DMDG-TFET.This is an open access article under the terms of the Creative Commons Attribution License, which permits use, distribution and reproduction in any medium, provided the original work is properly cited.

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“…Therefore, to improve the I ON of the device, TFET structures have been modified over the years [3][4][5][6][7][8][9][10], plus different kinds of materials have been used in the channel [11][12][13][14][15] and for gate formation [16]. Similarly for the device to exhibit a unipolar nature, several techniques have been proposed [17][18][19][20].…”

Section: Introductionmentioning

confidence: 99%

Design of a triple pocket multi-gate material TFET structure for low-power applications

Ahmad¹,

Alam²

2021

Semicond. Sci. Technol.

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In this paper we propose a triple-pocket multi-gate material TFET (TP-TFET) device structure for a low-power and high-performance circuit design. The proposed device structure integrates the good features of both the conventional MOSFET and tunnel FET. This is achieved through three doped pockets and dual work-function gate material on near the source–channel junction. In the proposed device, the ON state conduction mechanism is dominated by an over-the-barrier thermal diffusion of carriers, thereby offering a high-value drive current. On the other hand, the subthreshold conduction mechanism is dominated by the tunnelling of carriers, thereby incurring a very small leakage current and offering a small subthreshold slope. We use 2D TCAD device simulations for the analysis of the TP-TFET and its comparison with the existing pocketed-heterogate TFET (PHG-TFET). We observe that the proposed TFET offers the average subthreshold slope (SSavg) of 2.85 mV dec−1 and ON current of ∼230 µA µm−1 as compared to the existing PHG-TFET, which offers SSavg of 44.91 mV dec−1 and I ON = ∼62 µA µm−1. Further, some benchmark circuits are implemented using these devices. A ring oscillator designed using the TP-TFET shows approximately a 6× higher frequency as compared to that designed using the PHG-TFET. The power delay product of the NAND gate and NOR gate obtained using these devices differ by approximately 3× to 20× as the supply voltage is decreased from 1.0 to 0.5 V.

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Suppression of ambipolarity in tunnel‐FETs using gate oxide as parameter: analysis and investigation

Cited by 9 publications

References 25 publications

Suppression of P-I-N forward leakage current in tunnel field-effect transistor

Suppression of P-I-N forward leakage current in tunnel field-effect transistor

Temperature dependence of analogue/RF performance, linearity and harmonic distortion for dual‐material gate‐oxide‐stack double‐gate TFET

Design of a triple pocket multi-gate material TFET structure for low-power applications

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