Suppression of threshold voltage shifts in organic thin‐film transistors with bilayer gate dielectrics

Abstract

Bias-stress effects in pentacene thin-film transistors (TFT) with parylene-C and amorphous fluoropolymers as bilayer gate dielectric layers are systematically investigated. The threshold voltage shift can be controlled systematically by changing the thicknesses of the two dielectric layers. The shift is proportional to a proportion of a potential drop between parylene-C layer to the total potential drop between gate and source electrodes, and the threshold voltage shift can be fitted to a sum of the exponential functions. Devices with optimized thicknesses of the bilayer gate dielectrics show remarkable stability under continuous gate-bias voltage stress over long periods, demonstrating shifts in threshold voltage of less than 0.5 V after 48 h.

Vapor-phase deposition of the fluorinated copolymer gate insulator for the p-type organic thin-film transistor

“…The OTFTs with a copolymer gate insulator were compared with the control OTFTs with pV3D3 and SiO 2 gate insulators, respectively. The device with a copolymer insulator showed the smallest drain current drop and V T shift against the constant gate bias stress at −12 V. Unlike the previously reported fluorinated polymer fabricated through a solution process for enhanced operational stability [8,[16][17][18], the new copolymer insulator proposed herein exhibited a good insulating property with a thickness down to 70 nm. It is expected that the vapor-phase processed fluorine-containing copolymer insulator can be a useful platform for developing high-performance OTFTs in the future.…”

“…In addition, the chemical functionalities in polymers play an essential role in optimizing or precisely controlling the interfacial properties, and thus, the device performance [14][15][16]. For example, the surface fluorine functionalities in fluoropolymers have been suggested to enhance the operational stability of the p-type OTFTs [8,[16][17][18]. Despite the aforementioned advantages of polymers, the broad application of polymer insulators has been limited because the dielectric performance of such insulators is dramatically degraded when their thickness decreases to below 100 nm due to the formation of defects in them [10,12].…”

Stable organic thin-film transistors

“…In view of these considerations, we define the following analytical expression for Δ V TH ( t ), which we refer to as the double stretched-exponential (DSE) model where τ i are the characteristic decay times, β i are the dispersion parameters (0 <β i < 1), and Δ V TH, i ∞ = [ V TH, i (∞)– V TH (0)] is the threshold voltage change expected as time tends to infinity ( i = 1 or 2). Equations S4 and S5 present V TH ( t )-related analytical expressions for I DS ( t ) in the linear and saturation regimes, respectively ( 9 , 28 , 29 ). Figure 2 (A and B) displays a comparison of the best fits to the experimental data and the residuals (insets) using the SSE and DSE models.…”

Hybrid bilayer gate dielectric-based organic thin film transistors

“…Fukuda et al [96] have shown that by tuning the thickness of the gate dielectrics in a bilayer threshold voltage shift can be eliminated. Since, the bias stress effects (BSEs) are result of the trapping and de-trapping of the charge carriers near the semiconductor/dielectric interface, surface modification techniques to eliminate them can be employed.…”