2017
DOI: 10.1109/lcomm.2017.2668400
|View full text |Cite
|
Sign up to set email alerts
|

Synchronization Improvement of Distributed Clocks in EtherCAT Networks

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1
1
1

Citation Types

0
12
0

Year Published

2018
2018
2024
2024

Publication Types

Select...
6
1

Relationship

1
6

Authors

Journals

citations
Cited by 30 publications
(12 citation statements)
references
References 7 publications
0
12
0
Order By: Relevance
“…The frequency of each slave's drift compensation is set by the Speed_Counter_Start register, and this determines the time period for the execution cycle of the drift compensation and is typically set as significantly higher than 10 ns [11], [16]. It is noted that the drift compensation of the reference slave is optional as a configuration condition of the EtherCAT DC synchronization mechanism, and the drift compensation of the reference slave must be turned on to ensure that the time synchronization works between the master and all the slaves.…”
Section: Drift Compensationmentioning
confidence: 99%
See 3 more Smart Citations
“…The frequency of each slave's drift compensation is set by the Speed_Counter_Start register, and this determines the time period for the execution cycle of the drift compensation and is typically set as significantly higher than 10 ns [11], [16]. It is noted that the drift compensation of the reference slave is optional as a configuration condition of the EtherCAT DC synchronization mechanism, and the drift compensation of the reference slave must be turned on to ensure that the time synchronization works between the master and all the slaves.…”
Section: Drift Compensationmentioning
confidence: 99%
“…Subsequently, as soon as the system time function returns with each system time of the master and slave, the master stores the master system time in memory while the slaves send the slave system times to the master at each operation cycle, and the sent slave system times are stored in memory by the master. After completion of each experiment round, the system times of the master, reference slave, and last slave stored at each operation cycle are saved in an SD card, and the saved experimental results are transferred and analyzed on the analysis PC [11], [13].…”
Section: B Measurement Of Synchronization Errorsmentioning
confidence: 99%
See 2 more Smart Citations
“…Various researchers have tried to solve this problem using different control schemes [36][37][38]. However, these algorithms need to run in a separate real-time task, which could reduce the clock accuracy of the EtherCAT master because of context switching jitters.…”
Section: Synchronous Joint Space Controllermentioning
confidence: 99%