Synthesis for SoC architecture using VCores

Nishi, Hiroaki; Muraoka, Michiaki; Morizawa, Rafael K.; Yokota, Hideaki; Hamada, Hideyuki

doi:10.1145/1119772.1119862

Cited by 4 publications

(1 citation statement)

References 13 publications

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“…As regards abstraction, describing the function of property using C-based languages such as SystemC [4,5,6] and SpecC [7,8,9] without considering the concrete implementation of SoCs is a common approach. As for reusability, we have to consider the flexibility of both inter-property and inner property.…”

Section: Requirements For System-level Design Propertymentioning

confidence: 99%

VCore-based platform for SoC design

Onishi¹,

Muraoka²,

Utsuki³

et al. 2003

Proceedings of the 2003 Conference on Asia South Pacific Design Automation - ASPDAC

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The reuse-based design paradigm is the key to improve the design productivity of SoCs (System on a Chip). However, SoC designers have difficulty in using conventional IPs (Intellectual Property) because they don't have enough variability, it is difficult to customize them. In this paper, we propose the variability of VCores (Virtual Cores) and show VCores are superior to IPs for system-level design property. Based on VCores, we have developed a VCore-based platform. We show the SoC design productivity will be improved by using VCores and the VCore-based platform.

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Section: Requirements For System-level Design Propertymentioning

confidence: 99%

VCore-based platform for SoC design

Onishi¹,

Muraoka²,

Utsuki³

et al. 2003

Proceedings of the 2003 Conference on Asia South Pacific Design Automation - ASPDAC

Self Cite

View full text Add to dashboard Cite

show abstract

A PN-based approach to the high-level synthesis of digital systems

Shen

2006

Integration

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Design methodology for SoC architectures based on reusable virtual cores

Muraoka¹,

Nishi²,

Morizawa³

et al.

ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753)

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The design reuse methodology, which has been developed at the VCDS Project, is a SoC design methodology to reduce the SoC design time using high level design intellectual properties named as Virtual Cores (VCores). In this paper, we propose the VCore based design methodology to synthesize the SoC architecture from the system level specification. This synthesis methodology generates an initial architecture that consists of a CPU, buses, I/Os peripherals, and RTOS (Real Time Operating System), and makes tradeoffs between hardware and software on assigned software VCores and hardware VCores models to the architecture. The results of an architecture level design experiment using the proposed methodology shows that the partial automation of the communication refinement process, allied with design reuse, accelerates the architecture synthesis, thus reducing the design time required to design an architecture.

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Synthesis for SoC architecture using VCores

Cited by 4 publications

References 13 publications

VCore-based platform for SoC design

VCore-based platform for SoC design

A PN-based approach to the high-level synthesis of digital systems

Design methodology for SoC architectures based on reusable virtual cores

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