Synthesis of false loop free circuits

Huang, Shih-Hsu; Liu, Ta-Yung; Hsu, Yu-Chin; Oyang, Yen-Jen

doi:10.1145/224818.224840

Cited by 4 publications

(21 citation statements)

References 6 publications

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“…THEOREM 1: There is a false loop in the final hardware, if and only if there is a cycle in the corresponding resource allocation graph. Proof: The proof is given in [2]. Q.E.D.…”

Section: Preliminariesmentioning

confidence: 99%

“…Based on Theorem 1, an approach that guarantees to generate a false loop free schedule is proposed in [2]. The core algorithm is a list scheduling like algorithm.…”

Section: Preliminariesmentioning

confidence: 99%

“…Additional resources have to be added in order to build a false loop free circuit. Different from HIS system, Huang et al [2] propose an approach to solve the problem during the scheduling phase. A resource allocation graph is defined to model the circuit configuration, such as operation chaining and resource sharing, at the higher abstraction.…”

Section: Introductionmentioning

confidence: 99%

“…Although [2] solves the false loop problem, the approach is a greedy algorithm itself. It is obvious that different directed resource allocation graphs have different circuit mappings.…”

Section: Introductionmentioning

confidence: 99%

“…It is obvious that different directed resource allocation graphs have different circuit mappings. Since the acyclic resource allocation graph in [2] is constructed greedily, in many cases the obtained scheduled code still can be further improved. The improvements can be evaluated in terms of the number of control steps.…”

Section: Introductionmentioning

confidence: 99%

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Operation scheduling for the synthesis of false loop free circuits

Huang

Cheng

2007

IEICE Electron. Express

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If resource constraints are specified, the false loop free circuit must be built during the scheduling phase. Although the previous approach guarantees to have a false loop free circuit mapping, it does not attempt to minimize the number of control steps. In this paper, we present an effective approach to find a scheduled code, which not only guarantees to have a false loop free circuit mapping but also to minimize the number of control steps. Experimental results show that our approach achieves good results in terms of the number of control steps.

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“…THEOREM 1: There is a false loop in the final hardware, if and only if there is a cycle in the corresponding resource allocation graph. Proof: The proof is given in [2]. Q.E.D.…”

Section: Preliminariesmentioning

confidence: 99%

“…Based on Theorem 1, an approach that guarantees to generate a false loop free schedule is proposed in [2]. The core algorithm is a list scheduling like algorithm.…”

Section: Preliminariesmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

“…Although [2] solves the false loop problem, the approach is a greedy algorithm itself. It is obvious that different directed resource allocation graphs have different circuit mappings.…”

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations