System integration -The bridge between More than Moore and More Moore

Heinig, Andy; Dietrich, M.; Herkersdorf, Andreas; Miller, Felix; Wild, T. Cameron; Kai, Hirayasu; Grünewald, Armin; Brück, Rainer; Krohnert, Steffen; Reisinger, Jochen

doi:10.7873/date.2014.145

Cited by 4 publications

(2 citation statements)

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“…The semiconductor industry has used the FinFET technology to continue the down-scaling of technological nodes [1] as it has improved short-channel behavior and overcomes the growing sub-threshold leakage problem of planar CMOS technology [2]. Despite their benefits, FinFETs also present challenges; one of them is small manufacturing defects.…”

Section: Introductionmentioning

confidence: 99%

Hard-to-Detect Fault Analysis in FinFET SRAMs

Medeiros

Fieback

et al. 2021

IEEE Trans. VLSI Syst.

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Manufacturing defects can cause Hard-to-Detect (HTD) faults in FinFET SRAMs. Detection of these faults, such as random read outputs and out-of-spec parametric deviations, is essential when testing FinFET SRAMs. Undetected HTD faults result in test escapes, which lead to early in-field failures. This paper presents a detailed analysis of HTD faults in FinFET SRAMs by exploring their sensitization and discussing solutions to improve HTD fault coverage during manufacturing testing. We first define the fault space for SRAMs and classify all faults in the space. Following this, we perform a systematic fault analysis based on injecting resistive defects in a memory cell, inspecting its behavior, and identifying HTD faults. Furthermore, we survey existing test solutions and discuss their HTD fault coverage and limitations. Based on our analysis, it is clear that no single test solution can fully detect all HTD faults, thus leading to test escapes. Hence, there is a need for new and more efficient test solutions. Improved detection of HTD faults could be achieved by using parametric test solutions, proposing solutions that cover yet-untargeted HTD faults, combining multiple test approaches into a single solution, and further exploring stress conditions. These new approaches would reduce test escapes and therefore improve the quality of FinFET SRAMs.

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Section: Introductionmentioning

confidence: 99%

Hard-to-Detect Fault Analysis in FinFET SRAMs

Medeiros

Fieback

et al. 2021

IEEE Trans. VLSI Syst.

View full text Add to dashboard Cite

show abstract

“…Starting with technology, real engine of the whole field, it is convenient to distinguish between two types of developments, generally known as "More Moore" and "More than Moore, respectively [2,3].…”

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confidence: 99%