Systemc modelization for fast validation of imager architectures

Image sensors with integrated, programmable signal processing execute computationally intensive processing steps during or immediately after image acquisition, thereby allowing for reducing output data to relevant features only. In contrast to conventional image processing systems, the tasks of image acquisition and actual image processing in such a “vision chip” cannot be viewed independently of each other. Both for validating the architecture and supporting programming in the course of application development, modeling on the system level has been performed as part of the design process of the vision-system-on-chip. Apart from the implementation of all essential components of the integrated control unit as well as digital and analog signal processing, special attention has been paid to the integration into the development environment. Being able to purposefully insert parameter deviations and/or defects at different points of the analog processing enables investigations with respect to their influence on image processing algorithms performed on the image sensor. Due to its high simulation speed and compatibility to the real system, especially regarding the to-be-executed programs, the resulting simulation model is very well suited for use in application development

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Simulation environment for a vision-system-on-chip with integrated processing

Reichel

Hoppe

Döge

et al. 2015

Proceedings of the 9th International Conference on Distributed Smart Cameras

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Imagers with programmable, highly parallel signal processing execute computationally intensive processing steps directly on the sensor, thereby allowing early reduction of the amount of data to relevant features. For the purposes of architectural exploration during development of a novel Vision-System-on-Chip (VSoC), it has been modelled on system level. Aside from the integrated control unit with multiple independent control flows, the model also realizes digital and analogue signal processing. Due to high simulation speed and compatibility with the real system, especially regarding the programs to be executed, the resulting simulation model is very well suited for usage during application development. By providing the ability to purposefully introduce parameter deviations or defects at various points of analogue processing, it becomes possible to study them with respect to their influence on image processing algorithms executed within the VSoC

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Systemc modelization for fast validation of imager architectures

Cited by 3 publications

References 5 publications

Smart imagers modeling and optimization framework for embedded AI applications

Smart imagers modeling and optimization framework for embedded AI applications

Simulation platform for application development on a vision-system-on-chip with integrated signal processing

Simulation environment for a vision-system-on-chip with integrated processing

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