Systems Engineering of Cryogenic CMOS Electronics for Scalable Quantum Computers

Degenhardt, C.; Artanov, Anton A.; Geck, Lotte; Grewing, Christian; Kruth, A.; Nielinger, Dennis; Vliex, P.; Zambanini, André; Waasen, S. van

doi:10.1109/iscas.2019.8702442

Cited by 17 publications

(7 citation statements)

References 7 publications

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“…3(a), their structure is based on wellmatched capacitances, whose terminal connections are adjusted through digitally controlled switches. The main advantages of this configuration, regarding its cryogenic temperature performance, are the decreased total thermal noise power of the signal (kT/C) and the limited effect on CMOS transistors, when operating as transmission gates or digital control logic [16]. The last type, and most promising for GHz-frequency qubit control operations, is the currentsteering DAC shown in Fig.…”

Section: A Architecture Techniquesmentioning

confidence: 99%

Cryo-CMOS Mixed-Signal Circuits for Scalable Quantum Computing: Challenges and Future Steps

Kapoulea

Ahmad

Weides

et al. 2023

2023 IEEE International Symposium on Circuits and Systems (ISCAS)

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A systematic research on the development of cryogenic complementary metal-oxide semiconductor (cryo-CMOS) circuits, for implementing the required control electronics to manipulate the quantum bit (qubit) state, is performed over the last few years. Scalability constitutes a key term regarding the evolution of quantum computing from theory to practical application and CMOS technology has been proven to be a promising candidate for implementing the coveted scalable next-generation quantum computers (QCs). Mixed-signal blocks, used for uniting the analog and digital domains, play a key role in the efficient functionality of the qubit control/readout system, thus there is an ever-increasing interest in their high-performance circuit realization. The critical challenge in this venture is to achieve efficient cryogenic operation at low temperatures, i.e., close to the qubit around 4 K, simultaneously keeping power requirements at low values. An overview and comparison of the cryo-CMOS Digital-to-Analog converter (DAC) and Analog-to-Digital converter (ADC) circuit implementations for quantum computing applications that heretofore have been proposed in the literature is presented in this work. A discussion on the challenges and future strategic steps that are henceforth required to proceed toward the development of a functional scalable quantum computer is also conducted.

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Section: A Architecture Techniquesmentioning

confidence: 99%

Cryo-CMOS Mixed-Signal Circuits for Scalable Quantum Computing: Challenges and Future Steps

Kapoulea

Ahmad

Weides

et al. 2023

2023 IEEE International Symposium on Circuits and Systems (ISCAS)

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show abstract

“…Several research groups are currently investigating the integration of quantum control circuits, targeting operation at a physical temperature of 4 K [150]- [155]. However, the requirements for these systems are stringent and cooptimization of the classical controller and the quantum processor will likely be required.…”

Section: B Scaling Of Control Systemsmentioning

confidence: 99%

Microwaves in Quantum Computing

2021

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Quantum information processing systems rely on a broad range of microwave technologies and have spurred development of microwave devices and methods in new operating regimes. Here we review the use of microwave signals and systems in quantum computing, with specific reference to three leading quantum computing platforms: trapped atomic ion qubits, spin qubits in semiconductors, and superconducting qubits. We highlight some key results and progress in quantum computing achieved through the use of microwave systems, and discuss how quantum computing applications have pushed the frontiers of microwave technology in some areas. We also describe open microwave engineering challenges for the construction of large-scale, fault-tolerant quantum computers.

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“…The PLL/PLO therefore appears to be an interesting candidate radiofrequency source for a quantum microprocessor [10,11]. A survey of the recent literature reveals that, under the pressure of packing together a large number of qubits, being the estimated goal for the quantum supremacy in the range of tens of millions, the actual envisage solution is moving the classical CMOS circuitry closer to the qubits by levering on the actual microelectronics technology [12][13][14][15][16][17][18][19][20][21][22][23][24][25][26]. The design of cryogenic CMOS circuitry for a quantum microprocessor is a real multi-faceted activity covering RFIC [12,17,22,24,26], DAC [16,24,26], readout circuits [22,25], and more general aspects related to the microprocessor architecture [15,23,25] and to the cryogenic system, as well.…”

Section: Pll/plo and Quantum Microprocessorsmentioning

confidence: 99%

“…Because the MD and ML transistors have been sized at minimum length and with the same channel width, it is reasonable to consider all the overlap parasitic capacitances equal to a given value COV, CDB,D1 and CDB,L2 equal to a given value CDB, and COX,L1 and COX,D2 equal to a given value COX,LD. By replacing Equation (24) into Equation (23) one gets:…”

Section: Frequency Divider: Design and Modelingmentioning

confidence: 99%

On the VCO/Frequency Divider Interface in Cryogenic CMOS PLL for Quantum Computing Applications

2021

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The availability of quantum microprocessors is mandatory, to efficiently run those quantum algorithms promising a radical leap forward in computation capability. Silicon-based nanostructured qubits appear today as a very interesting approach, because of their higher information density, longer coherence times, fast operation gates, and compatibility with the actual CMOS technology. In particular, thanks to their phase noise properties, the actual CMOS RFIC Phase-Locked Loops (PLL) and Phase-Locked Oscillators (PLO) are interesting circuits to synthesize control signals for spintronic qubits. In a quantum microprocessor, these circuits should operate close to the qubits, that is, at cryogenic temperatures. The lack of commercial cryogenic Design Kits (DK) may make the interface between the Voltage Controlled Oscillator (VCO) and the Frequency Divider (FD) a serious issue. Nevertheless, currently this issue has not been systematically addressed in the literature. The aim of the present paper is to investigate the VCO/FD interface when the temperature drops from room to cryogenic. To this purpose, physical models of electronics passive/active devices and equivalent circuits of VCO and the FD were developed at room and cryogenic temperatures. The modeling activity has led to design guidelines for the VCO/FD interface, useful in the absence of cryogenic DKs.

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Systems Engineering of Cryogenic CMOS Electronics for Scalable Quantum Computers

Cited by 17 publications

References 7 publications

Cryo-CMOS Mixed-Signal Circuits for Scalable Quantum Computing: Challenges and Future Steps

Cryo-CMOS Mixed-Signal Circuits for Scalable Quantum Computing: Challenges and Future Steps

Microwaves in Quantum Computing

On the VCO/Frequency Divider Interface in Cryogenic CMOS PLL for Quantum Computing Applications

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