T2CAD: Total Design for Sub-um Process and Device Optimization with Technology-CAD

Masuda, H.

doi:10.1007/978-3-7091-6619-2_99

Cited by 3 publications

(1 citation statement)

References 3 publications

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“…S EMICONDUCTOR technology relies essentially on technology CAD (TCAD) support during process development and process optimization. The traditional approach of using simulators for investigating isolated design aspects, e.g., for the determination of the source-drain doping profile in a lightly doped drain (LDD) structure, has been replaced by the computer-aided analysis of complete VLSI fabrication processes [1]. Apart from the increasing availability of more powerful computer systems, three reasons for this TCAD paradigm can be found.…”

Section: Introductionmentioning

confidence: 99%

Simulation of complete VLSI fabrication processes with heterogeneous simulation tools

Pichler¹,

Plasun²,

Sträßer³

et al. 1999

IEEE Trans. Semicond. Manufact.

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An integrated environment for the simulation of VLSI fabrication processes is presented. Emphasis is put on automated operation to achieve maximum efficiency in TCAD deployment. Addressing the increasing number and diversity of process steps in state-of-the-art semiconductor fabrication processes, mechanisms have been devised to support the smooth, automatic interaction of heterogeneous simulation tools with multiple data formats in the context of large-scale experiments for global calibration, device optimization, and yield improvement tasks. For maximum versatility, the operation of the environment is either controlled via a graphical user interface, a batch file, or a combination of the two. It is possible to submit predefined analysis tasks for background execution, while still being able to monitor and control operation and to access and view simulation data interactively. Split-lot experiments are performed on workstation clusters in parallel operation, delivering the desired results in the shortest possible time. The TCAD environment presented offers server functionality for running large number of complex simulations. At the same time, it supports the design and seamless integration into the environment of client task applications.

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Section: Introductionmentioning

confidence: 99%

Simulation of complete VLSI fabrication processes with heterogeneous simulation tools

Pichler¹,

Plasun²,

Sträßer³

et al. 1999

IEEE Trans. Semicond. Manufact.

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Intra-field effects on device and circuit manufacturability: a statistical simulation approach

Krivokapić

Heavlin²

1999

IEEE Trans. Semicond. Manufact.

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In spite of the numerous improvements in deep ultraviolet (DUV) lithography, minimizing lens aberrations remains critical to obtaining manufacturable logic technologies. In this paper, we investigate the effects of lens imperfections on the distributions of process, device, and circuit parameters. Lens imperfections, as manifested by intrafield gate critical dimension (CD) variations, can affect device and circuit parameters strongly. The latter is central to designing fast high-yielding logic products, especially microprocessors. Our approach employs process, device, and statistical simulations, coupled with extensive calibration, to predict manufacturing distributions for a new technology well before it is ramped to full-scale production. We study nominal channel length n-and p-channel devices, inverter ring oscillators, and four-input NAND standard cells. We compare different stepper conditions both for conventional and annular illumination. We consider the case of more than one die in a reticle field and investigate how lens imperfections affects different dice therein. We apply our approach to an experimental DUV stepper and demonstrate coma effects that potentially lower yields. Our results also include a paradox: the best annular illumination case, which betters the CD distributions of conventional illumination, ultimately yields worse circuit performance. 0894-6507/99$10.00 © 1999 IEEE Zoran Krivokapic (M'92-SM'98) received B.Sc. and M.Sc. degrees in physics and the Ph.D. degree in electrical engineering from University of Ljubljana, Slovenia. From 1983 to 1989, he worked

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Device Simulation Using Silvaco ATLAS Tool

Sarkar¹

2013

Technology Computer Aided Design

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T2CAD: Total Design for Sub-um Process and Device Optimization with Technology-CAD

Cited by 3 publications

References 3 publications

Simulation of complete VLSI fabrication processes with heterogeneous simulation tools

Simulation of complete VLSI fabrication processes with heterogeneous simulation tools

Intra-field effects on device and circuit manufacturability: a statistical simulation approach

Device Simulation Using Silvaco ATLAS Tool

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