TCAD based performance analysis of junctionless cylindrical double gate all around FET up to 5nm technology node

Hossain, Nazir; Quader, Sakib; Siddik, Abu Bakar; Chowdhury, Md. Iqbal Bahar

doi:10.1109/iccitechn.2017.8281858

Cited by 14 publications

(8 citation statements)

References 17 publications

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“…Micromachines 2019, 10, 847 9 of 11 Figure 9. Band-to-band tunneling generation with three different alpha particle energy injections (3,6, and 9 MeV) at the (a) source, (b) channel, and (c) drain.…”

Section: Resultsmentioning

confidence: 99%

“…As semiconductor technology continues to scale down, a 5-nm technology node has been produced that is considered to be the most significant three-dimensional (3D) fin field-effect transistor (FinFET) architecture utilized since the 22-nm technology node [1][2][3][4][5]. Recently, 3D gate-all-around semiconductor devices, such as multi-nanowire and multi-nanosheet devices, have been attracting attention [6][7][8]. Carrier transport from the planar MOS field-effect transistor (MOSFET) to the 3D FinFET is based on the drift-diffusion (DD) transport mechanism.…”

Section: Introductionmentioning

confidence: 99%

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Alpha Particle Effect on Multi-Nanosheet Tunneling Field-Effect Transistor at 3-nm Technology Node

et al. 2019

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The radiation effects on a multi-nanosheet tunneling-based field effect transistor (NS-TFET) were investigated for a 3-nm technology node using a three-dimensional (3D) technology computer-aided design (TCAD) simulator. An alpha particle was injected into a field effect transistor (FET), which resulted in a drain current fluctuation and caused the integrated circuit to malfunction as the result of a soft-error-rate (SER) issue. It was subsequently observed that radiation effects on NS-TFET were completely different from a conventional drift-diffusion (DD)-based FET. Unlike a conventional DD-based FET, when an alpha particle enters the source and channel areas in the current scenario, a larger drain current fluctuation occurs due to a tunneling mechanism between the source and the channel, and this has a significant effect on the drain current. In addition, as the temperature increases, the radiation effect increases as a result of a decrease in silicon bandgap energy and a resultant increase in band-to-band generation. Finally, the radiation effect was analyzed according to the energy of the alpha particle. These results can provide a guideline by which to design a robust integrated circuit for radiation that is totally different from the conventional DD-FET approach.

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Section: Resultsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Alpha Particle Effect on Multi-Nanosheet Tunneling Field-Effect Transistor at 3-nm Technology Node

et al. 2019

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“…In JLFETs, the majority carriers are conducted in the center of the channel instead of the surface, and the majority carriers in the channel are completely depleted by the gate bias to shut down the device. Moreover, the multigate structure can effectively improve the gate-tochannel control capability, so JLFET devices usually use a double gate to achieve complete channel depletion [8]. It has been verified that the gate metal of JLFETs must have a work function greater than 5.0 eV to completely deplete the Si body to reach the off state [2].…”

Section: Odlična Učinkovitost Dvovratnega Brezspojnega Poljskega Tranmentioning

confidence: 99%

Superior Performance of a Negative-capacitance Double-gate Junctionless Field-effect Transistor with Additional Source-drain Doping

2020

Informacije MIDEM

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In this work, we propose a negative-capacitance double-gate junctionless field-effect transistor (NC-JLFET) with additional source-drain doping. Superior performance of the NC-JLFET due to source and drain doping concentration is explained in detail. Additionally, the effects of the drain induced barrier lowering (DIBL) and negative differential resistance (NDR) are precisely analyzed in the NC-JLFET. Sentaurus TCAD simulation demonstrates that the additional source-drain-doped NC-JLFET exhibits a higher on/ off current ratio (ION/IOFF) and steeper subthreshold swing (SS < 60 mV/dec) compared to a traditional JLFET. Besides, the negative capacitance effect causes the internal voltage of the gate to be amplified, resulting in negative DIBL and NDR phenomena. Finally, the performance of NC-JLFET can also be optimized by choosing suitable ferroelectric material parameters, such as ferroelectric thickness, coercive field, and remnant polarization. Our simulation study provides theoretical and experimental support for further performance improvement of low-power NCFETs by local structure adjustment.

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“…In addition, negative capacitance field-effect transistors (NCFETs), which are fabricated by drawing into the ferroelectric (FE) material behaving as a series of NC stacked on the gate of the traditional complementary metal-oxide-semiconductor (CMOS) devices generally possess a higher performance and lower power consumption [8][9][10]. Owing to the good compatibility of the doped HfO2 layer with conventional high-κ semiconductor technology, the NCFETs have great potential to realize ultra-low power consumption and highefficient switching even for sub-3 nm technology node [11]. Therefore, JL-FETs with NC effect are considered as a promising candidate for fabricating next generation advanced CMOS devices in lower power application.…”

Section: Introductionmentioning

confidence: 99%

Reduction of Random Dopant Fluctuation-induced Variation in Junctionless FinFETs via Negative Capacitance Effect

2021

Informacije MIDEM

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In this study, we investigated the impact of random dopant fluctuation (RDF) on junctionless (JL) fin field-effect transistors (FinFETs) with ferroelectric (FE) negative capacitance (NC) effect. The RDF-induced variations were captured by using built-in Sano methodology in three-dimensional technology computer-aided design (TCAD) simulation. Compared to the regular JL-FinFETs, the variations in JL-FinFETs with NC effect (NCJL-FinFETs) was observed to be less via statistical Monte Carlo analysis, which further enhanced its performance as well. The evaluation and estimation of threshold voltage (V T ), ON-state current (I on ), OFF-state current (I off ), and subthreshold swing (SS) by different FE layer thicknesses indicated reduction in the standard deviations of VT (δV T ) and Ion (δI on ) by 34.7% and 7.08%, respectively; the OFF-state current and its standard deviation shrank by approximately three orders of magnitude than the JL-FinFET counterpart. Although δSS was not monotonous, the SS was significantly improved to sub-60 mV/decade. To sum up, the regular JL-FinFETs containing the FE layer as NC effect not only improved the electrical performance, but also led to the resilience of the RDF-induced statistical variability.

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TCAD based performance analysis of junctionless cylindrical double gate all around FET up to 5nm technology node

Cited by 14 publications

References 17 publications

Alpha Particle Effect on Multi-Nanosheet Tunneling Field-Effect Transistor at 3-nm Technology Node

Alpha Particle Effect on Multi-Nanosheet Tunneling Field-Effect Transistor at 3-nm Technology Node

Superior Performance of a Negative-capacitance Double-gate Junctionless Field-effect Transistor with Additional Source-drain Doping

Reduction of Random Dopant Fluctuation-induced Variation in Junctionless FinFETs via Negative Capacitance Effect

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