Temperature-aware register reallocation for register file power-density minimization

Abstract

Increased chip temperature has been known to cause severe reliability problems and to significantly increase leakage power. The register file has been previously shown to exhibit the highest temperature compared to all other hardware components in a modern high-end embedded processor, which makes it particularly susceptible to faults and elevated leakage power. We show that this is mostly due to the highly clustered register file accesses where a set of few registers physically placed close to each other are accessed with very high frequency. We propose compile-time temperature-aware register reallocation methodologies for breaking such groups of registers and to uniformly distribute the accesses to the register file. This is achieved with no performance and no hardware overheads. We show that the underlying problem is NP-hard, and subsequently introduce and evaluate two efficient algorithmic heuristics. Our extensive experimental study demonstrates the efficiency of the proposed methodology. ACM Reference Format:Zhou, X., Yu, C., and Petrov, P. 2009. Temperature-aware register reallocation for register file power-density minimization.

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Wearout-aware compiler-directed register assignment for embedded systems

“…It is important to note that we extract these values at compile time. Although runtime profiling of these functions is an adequate methodology [27], our approach is more time efficient, and the estimated number of calls at compile time is close to the actual number of calls at runtime. Once calculated, this weight factor is then used to select the window for each function, with the aim of uniformly distributing the wearout across the register file.…”

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“…As ours, a very recent the work by Zhou et al [19] proposes a register reallocation algorithm for power-density minimization in the register file. However, they target a few specific cases (high-power density registers) in VLIW architectures.…”