Test generation algorithm for analog systems based on support vector machine

Abstract

In some methods for test generation, an analog device under test (DUT) is treated as a discrete-time digital system by placing it between a digital-to-analog converter and an analog-to-digital converter. Then the test patterns and responses can be performed and analyzed in the digital domain. We propose a novel test generation algorithm based on a support vector machine (SVM). This method uses test patterns derived from the test generation algorithm as input stimuli, and sampled output responses of the analog DUT for classification and fault detection. The SVM is used for classification of the response space. When the responses of normal circuits are similar to those of faulty circuits (i.e., the latter have only small parametric faults), the response space is mixed and traditional algorithms have difficulty in distinguishing the two groups. However, the SVM provides an effective result. This paper also proposes an algorithm to calculate the test sequence for input stimuli using the SVM results. Numerical experiments prove that this algorithm can enhance the precision of test generation.

Test Generation Algorithm for Fault Detection of Analog Circuits Based on Extreme Learning Machine

“…The nonlinear classification algorithm is adopted for test generation in order to improve classification accuracy [2], but this algorithm deals with classification problems by mapping the original space to a higher dimension of feature space; that is to say, it obtains a linear classification hyperplane in a higher dimension of space. Therefore, in order to generate test signals, we need to calculate the classification hyperplane in linear dimension from the linear classification hyperplane in a higher dimension of space, which is a very complex process.…”

“…And, in [2], coefficients c and c d will be calculated. Computational costs of this process mainly come from calculation of Lagrange multiplier a , while the calculating process is equivalent to solving matrix with a size of (2 N + 1)×(2 N + 1) × 2.…”

“…This method has good classification performance, but inadequate testing accuracy. Long et al propose a test generation algorithm for analog systems based on support vector machine (SVM) in 2011 [2]. This algorithm with high testing accuracy uses SVM to map the lower-dimensional nonlinear response space into the higher-dimensional feature space for effective classification.…”

A Novel Modeling Technique for Operational Amplifier Using RBF - ELM

“…So, on the basis of mapping of the analog circuits of various models, many modeling techniques have been formulated [3]. To them various machine-learning algorithms are available which are able to map these circuits with reliable models which work as similar to the circuits [4,5]. Machine learning is an area of artificial intelligence where various algorithms are formulated to develop various systems which can be able to perform classification, clustering, regression and many other activities.…”

A Novel Fault Diagnostic Method Based on Node-Voltage Vector Ambiguity Sets

“…Improvements have mainly focused on decision algorithms and test node selection. Although several methods on multifrequency stimuli have been described [19], [20], reports on node-voltage vector ambiguity sets for analog circuits remain minimal until the present. The dc-based approach cannot cover the numerous faults of some dynamic analog circuits with several electric capacitors.…”