TFSOI CMOS technology for sub-1 V microcontroller circuits

Huang, W.M.; Papworth, K.; Racanelli, M.; John, J.P.; Foerstner, J.; Shin, H.; Park, H.; Hwang, Bor-Yuan; Wetteroth, T.; Hong, Sung Pil; Wilson, S. R.; Cheng, Sunny

doi:10.1109/iedm.1995.497182

Cited by 14 publications

(3 citation statements)

References 6 publications

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“…This is accomplished with negligible overhead in speed and area, and with less than 5% increase in cost and turnaround time [4]. Finally, the TFSOI technology, due to inherently low junction capacitances and small body effect, can achieve 2x increase in performance for identical layout and design rules as bulk CMOS [5]. The choice of technology and device parameter optimization must be ultimately based on manufacturability.…”

Section: Introductionmentioning

confidence: 99%

Manufacturability of low power CMOS technology solutions

Strojwas¹,

Quarantelli²,

Borel³

et al.

Proceedings of 1996 International Symposium on Low Power Electronics and Design

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This paper discusses manufacturabilty of state-of-the-art low power technologies. We report the results on two generations of bulk CMOS technologies, triple-well CMOS and Thin Film Silicon on Insulator (TFSOI) technologies. We present technology capabilities for several values of supply voltage and address the issue of performance scaling with the supply voltage reduction. Then we focus on the statistical characterization of these technologies and discuss both interchip and intrachip variations. Finally, we present the digital and analog designer perspectives on the low power IC operation.

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Section: Introductionmentioning

confidence: 99%

Manufacturability of low power CMOS technology solutions

Strojwas¹,

Quarantelli²,

Borel³

et al.

Proceedings of 1996 International Symposium on Low Power Electronics and Design

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“…A recent study in SO1 circuits yield showed that bulkcomparable yield can be achieved using standard SIMOX substrates with an optimized isolation process [27]. A 10 year NMOS device lifetime at V, , of -3V (Fig.…”

Section: Manufacturabilitymentioning

confidence: 97%

“…5~ partially-depleted CMOS SO1 process, microcontroller CPU frequency performance improved -2X over bulk CMOS while maintaining a -10% frequency variation [27]. The active power is redud 30% while the standby current is reduced up to 1OX (Fig.…”

Section: C) Digitalmentioning

confidence: 98%

TFSOI technology for portable wireless communication systems

Huang

Tseng²,

Monk³

et al.

Proceedings of CICC 97 - Custom Integrated Circuits Conference

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Recent growth in the portable wireless communication market has driven semiconductor technologies toward voltage and power reduction. The reduced junction capacitance and near-ideal MOS device characteristics of SO1 provides an inherent advantage for low-voltage low-power applications. Substantial progress in applying SO1 technology for these applications has been demonstrated in recent years. The quest for a single chip system has also initiated work in developing high frequency and analog SO1 circuits. In this paper, the application of Thin-Film-Silicon-On-Insulator (TFSOI) technology for wireless communication systems will be reviewed and future development will be discussed.

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