The Design and Analysis of Dual-Delay-Path Ring Oscillators

Chen, Zuow-Zun; Lee, Tai-Cheng

doi:10.1109/tcsi.2010.2072390

Cited by 73 publications

(32 citation statements)

References 12 publications

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“…This paper starts from [8], whose focus was on the theoretical study of the phase noise of unsaturated ring oscillators. As shown in the next section, unsaturated ring oscillators typically have low N. This paper shows that one such unsaturated oscillator, with N = 2, can achieve an increased f o , while possessing a stable and unique oscillation mode, and thus does not need start up circuitry as [2][3][4][5][6]. To investigate the stability and uniqueness of this oscillation, and considering that the circuit is highly nonlinear with discontinuous function (since some of the transistors are switched on and off), in this paper a heuristic, geometric argument based on phase plane is used [9][10][11].…”

Section: Introductionmentioning

confidence: 77%

“…This is presented in Table 1 and compared to [2][3][4][5][6]. It is seen that this oscillator has higher f o , and draws smaller I supply .…”

Section: Oscillation Frequency Improvement and Comparisonmentioning

confidence: 98%

“…2(b)), oscillator becomes unsaturated, and period, T o , becomes shorter (f o increases). For previous designs [2][3][4][5][6] the lowest N = 3, and the output can remain saturated. To increase f o , this paper uses N = 2, with delay cell from Fig.…”

Section: Oscillation Frequency Improvement and Comparisonmentioning

confidence: 99%

“…Circuit-wise reducing the W/L ratio means reducing the negative impedance of the cross coupled pair. [3], sat in common mode, unsat in differential mode, for [5], sat when feedback index ''i'' is even, unsat when ''i'' is odd We start with stage 1, so (refer to Fig. 1(b)):…”

Section: Qualitative Descriptionmentioning

confidence: 99%

“…Multiple delay paths were used [2][3][4][5][6]. However they suffer from multiple oscillation modes and thus need extra start up circuitry [2,3].…”

Section: Introductionmentioning

confidence: 99%

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Investigation of a high frequency CMOS unsaturated ring oscillator

Leung

2012

Analog Integr Circ Sig Process

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Investigation of a high frequency unsaturated ring oscillator with cross coupled load is presented, and oscillation frequency compared with multi-path high frequency ring oscillators. Stability of oscillation is shown heuristically, via geometric argument on a phase plane, where the presence of negative impedance in the cross coupled pair of the delay cell is deemed important. Oscillation frequency formula is presented, and design insight given. In addition, a novel design methodology on lowering its phase noise is developed. Simulations on example circuit designs using 0.18 lm CMOS technology demonstrate the higher frequency obtained, oscillation stability, frequency formula and design insight, as well as phase noise methodology.

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Section: Introductionmentioning

confidence: 77%

“…This is presented in Table 1 and compared to [2][3][4][5][6]. It is seen that this oscillator has higher f o , and draws smaller I supply .…”

Section: Oscillation Frequency Improvement and Comparisonmentioning

confidence: 98%

Section: Oscillation Frequency Improvement and Comparisonmentioning

confidence: 99%

Section: Qualitative Descriptionmentioning

confidence: 99%

“…Multiple delay paths were used [2][3][4][5][6]. However they suffer from multiple oscillation modes and thus need extra start up circuitry [2,3].…”

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

Investigation of a high frequency CMOS unsaturated ring oscillator

Leung

2012

Analog Integr Circ Sig Process

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Survey of integrated‐circuit‐oscillator phase‐noise analysis

Pankratz

Sánchez-Sinencio

2013

Circuit Theory & Apps

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This tutorial distills the salient phase-noise analysis concepts and key equations developed over the last 75 years relevant to integrated circuit oscillators. Oscillator phase and amplitude fluctuations have been studied since at least 1938 when Berstein solved the Fokker-Planck equations for the phase/amplitude distributions of a resonant oscillator.The principal contribution of this work is the organized, unified presentation of eclectic phase-noise analysis techniques, facilitating their application to integrated circuit oscillator design. Furthermore, we demonstrate that all these methods boil down to obtaining three things: (1) noise modulation function; (2) noise transfer function; and (3) current-controlled oscillator gain. For each method, this paper provides a short background explanation of the technique, a step-by-step procedure of how to apply the method to hand calculation/computer simulation, and a worked example to demonstrate how to analyze a practical oscillator circuit with that method.This survey article chiefly deals with phase-noise analysis methods, so to restrict its scope, we limit our discussion to the following: (1) analyzing integrated circuit metal-oxide-semiconductor/bipolar junction transistor-based LC, delay, and ring oscillator topologies; (2) considering a few oscillator harmonics in our analysis; (3) analyzing thermal/flicker intrinsic device-noise sources rather than environmental/parametric noise/ wander; (4) providing mainly qualitative amplitude-noise discussions; and (5) omitting measurement methods/phase-noise reduction techniques.We categorize oscillators into one of three varieties, as illustrated in Figure 3: resonant, delay line, or relaxation. First, the resonant oscillator consists of a nonlinear amplifier and a lumped frequencyselective network or resonator, which typically has a band-pass frequency response with a single magnitude peak as indicated conceptually in the figure. This resonator can take the form of an LC tank circuit, dielectric puck, quartz crystal, SAW or bulk acoustic wave transducer, yttrium iron garnet resonator, or ceramic disk resonator to name a few [43,147,148]. IC resonant oscillators typically use LC tanks, although they are often designed to work in concert with an external 874 E. PANKRATZ AND E. SÁNCHEZ-SINENCIO ! ss t ð Þ correspond to the roughly circular trajectory in the figure called a limit cycle [150].Figure 4. Optoelectronic delay-line oscillator. 876 E. PANKRATZ AND E. SÁNCHEZ-SINENCIO For some subtleties of amplitude-noise behavior, see [50,143], where [50] also points out effects of not employing Floquet normalization (cf. Section 4.7).½ =fVoigt ð Þ 2(Gaussian) at small offsets [78,151,152,154]. Chorti also observed that, in general, noise processes with long correlation times tend to create such 'Gaussian' voltage spectra for small frequency offsets f m [151,152]. 4 Note well that, technically, defining spectra for f proves problematic, as it is not stationary and, what is worse, not bounded. This is in fact one reason why the ...

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Analysis and design approach of wideband digital‐based feedforward ring oscillators

Arenas

Moya

Roa

2023

Circuit Theory & Apps

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Multi‐protocol applications and complex systems‐on‐chip demand several clock sources to fulfill all data‐rate requirements. Among the different types of clock sources, LC oscillators dominate the high data‐rate communication standards where frequency stability is a major constraint. In contrast, ring oscillators are preferred for legacy support applications due to their wider tuning range and where stability is not a constraint. Since stability enhancement techniques have been already implemented to ring oscillators, increasing the tuning range of a single ring clock reference might fulfill a broad margin of data rates. This paper presents an analysis and a design approach of wideband digital‐based oscillators based on secondary feedforward paths to support most of the data‐rate requirements inside systems‐on‐chips. Here, we present the inclusion of these auxiliary loops as a tuning range enhancement technique to reduce the total number of required clock references. The presented analysis comprises piece‐wise functions able to accurately predict an FDRO oscillation frequency. Using the piece‐wise model, we present a 15,000 12‐track standard‐cell scalable feedforward oscillator. Auxiliary feedforward inverters allow a maximum 1.5 GHz frequency and a 3 tuning range enhancement while enabling a 100 kHz minimum oscillation frequency. The proposed oscillator occupies an area of 0.05 mm2 in a 180 nm CMOS pure digital node and achieves a 41 ps@1.25 GHz RMS jitter of and a −121 dB FOM.

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The Design and Analysis of Dual-Delay-Path Ring Oscillators

Cited by 73 publications

References 12 publications

Investigation of a high frequency CMOS unsaturated ring oscillator

Investigation of a high frequency CMOS unsaturated ring oscillator

Survey of integrated‐circuit‐oscillator phase‐noise analysis

Analysis and design approach of wideband digital‐based feedforward ring oscillators

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