The Design Of 300MIPS Microprocessor With A Full Associative TLB For Hand-held PC OS

This paper presents a novel technique to reduce the energy and delay of dynamic large fan-in gates. The basic idea is to generate a low swing output signal by first charging a small dummy capacitor and then discharging it on the (pre-discharged) gate output. By employing the principle of charge sharing, a small swing will be created on the gate output. This swing can be then detected and restored to CMOS level using a sense amplifier. Simulation results illustrates 2 to 4 times energy savings and up to 3.6 times speed-up as compared to conventional dynamic approaches. The design of a 32x32 TLB in a 0.6 um process using the proposed approach is also described.

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A 200 MHz 1.2 W 1.4 GFLOPS microprocessor with graphic operation unit

Nishii

Arakawa²,

Ishibashi³

et al.

1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156)

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The Design Of 300MIPS Microprocessor With A Full Associative TLB For Hand-held PC OS

Cited by 5 publications

References 2 publications

Design methodology of a 200 MHz superscalar macroprocessor: SH-4

Design methodology of a 200 MHz superscalar macroprocessor: SH-4

Use of charge sharing to reduce energy consumption in wide fan-in gates

A 200 MHz 1.2 W 1.4 GFLOPS microprocessor with graphic operation unit

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