The effect of ZrO2 buffer layer on electrical properties in Pt/SrBi2Ta2O9/ZrO2/Si ferroelectric gate oxide structure

Choi, Hoon; Kim, Eun Hong; Choi, In–Hoon; Kim, Yong Tae; Choi, Jae Hyoung; Lee, Jun Young

doi:10.1016/s0040-6090(01)00826-4

Cited by 39 publications

(14 citation statements)

References 7 publications

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“…ZrO 2 thin films have high potential for many applications, such as a buffer layer for integration of ferroelectric thin films in nonvolatile ferroelectric memories, the gate dielectric for complementary metal oxide semiconductors, and oxygen sensors [1][2][3]. It is important for the various applications of ZrO 2 thin films to control the crystallinity, orientation and surface morphology.…”

Section: Introductionmentioning

confidence: 99%

Surface morphology control of zirconia thin films prepared using novel photochromic molecules

et al. 2008

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Section: Introductionmentioning

confidence: 99%

Surface morphology control of zirconia thin films prepared using novel photochromic molecules

et al. 2008

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“…Before 2000, numerous reports were focused on ferroelectricity in perovskites, such as LiNbO 3 , YMnO 3 , PbTiO 3 , and (Ba,Sr)TiO 3 . From 2000 onward, research on ferroelectric materials was intensive, primarily on SrBi 2 Ta 2 O 9 (SBT), − (Bi,La) 4 Ti 3 O 9 (BLT), − Pb(Zr,Ti)O 3 (PZT), − and so on due to their excellent fatigue and leakage characteristics. From the above, PZT emerged as a promising candidate due to its high P r and low crystallization temperature and was widely adopted in commercial 1T-1C FeRAM applications. , However, polycrystalline PZT or PZT with Pt electrodes suffers from fatigue (<10 8 cycles).…”

Section: Ferroelectric Materialsmentioning

confidence: 99%

Integration of Ferroelectric Materials: An Ultimate Solution for Next-Generation Computing and Storage Devices

Khosla

Sharma

2021

ACS Appl. Electron. Mater.

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Over the decades since ferroelectricity was revealed, ferroelectric materials have emerged as a cornerstone for a wide spectrum of semiconductor technology and electronic device applications, particularly in state-of-the-art complementary metal oxide semiconductor (CMOS) logic circuits and digital information storage media. Recent unprecedented advancements and future perspectives on integrating ferroelectric materials, particularly with high-κ dielectrics for electronic devices, are weighed. The emphasis is on (i) application (logic and memory); (ii) ferroelectric materials (organic, inorganic, and two-dimensional (2D)); (iii) device structures (metal/ferroelectric/metal (MFM), metal/ferroelectric/semiconductor (MFS), metal/ferroelectric/insulator/semiconductor (MFIS), and metal/ferroelectric/metal/insulator/semiconductor (MFMIS)); and (iv) next-generation electronic devices (negative capacitance field effect transistors (NC-FETs), ferroelectric RAM (FeRAM), ferroelectric field effect transistors (FeFETs), and ferroelectric tunnel junctions (FTJs)). In NCFETs, the ferroelectric layer serves as a negative capacitor so that the channel surface potential can be amplified more than the gate voltage. Hence, devices can overcome the “Boltzmann tyranny” and operate with a steep subthreshold swing < 60 mV/dec and supply voltage < 0.5 V. Thus, NC-FETs would be more suitable for high-speed logic operations, scalability, low-power, and cost-effectiveness, targeting applications such as 14T-type CPU registers and 6T-type cache static random access memory (SRAM). Ferroelectrics also opens a path to solving the problems associated with technology scaling due to the unique structural and electronic properties. Ferroelectric memories are anticipated to be in different flavors based on optimum performance, cost, and end-user requirements. Herein, we deliberate on the exciting possibilities for the development of device structures such as one-transistor one-capacitor (1T-1C)-type FeRAM with fast access time (<10 ns), high endurance (∼>1014 cycles), and moderate data retention being considered as a strong contender for volatile dynamic random access memory (DRAM), while, for nonvolatile memory applications, 1T-type ferroelectric gated transistors, called FeFETs with nondestructive readout, fast access time (∼<100 ns), moderate endurance (>109 cycles), and high retention time (>10 years) have the potential to compete with embedded solid-state drives (SSDs). Finally, the FTJs with three-dimensional cross-point architecture are strong contenders for high-density niche storage applications to interchange with low-cost per bit external hard disk drives. We conclude with a brief survey of recent ferroelectrics advances and potential futuristic comparisons for next-generation computing and storage device applications so the field may expand and pave the way for high-volume manufacturing of semiconductor technology down to the sub-5 nm node over the coming years.

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“…12) Finally, we fabricated the n-channel ferroelectric-gate FET with Au/SBT/LZO/Si structure, and then investigated the physical and electrical properties of the fabricated MFIS-FETs.…”

Section: Introductionmentioning

confidence: 99%

Characteristics of Au/SBT/LZO/Si MFIS structure for ferroelectric-gate field-effect transistors

Park

2009

J. Ceram. Soc. Japan

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Non-volatile memories using ferroelectric-gate field-effect transistors (Fe-FETs) with metal/ferroelectric/semiconductor gate stack (MFS-FETs) have superior advantages such as non-destructive read operation and high density. However, the interfacial reactions between ferroelectric materials and Si substrates make it difficult to obtain good electrical properties of MFS-FETs. As an alternative solution, Fe-FETs with a metal/ferroelectric/insulator/insulator/semiconductor gate stack (MFIS-FETs) have been proposed. We prepared SrBi2Ta2O9 (SBT) film as a ferroelectric layer and LaZrOx (LZO) film as the insulating buffer layer, and then fabricated the n-channel Fe-FETs with the Au/SBT/LZO/Si structure. The thickness of the LZO buffer layer and SBT film deposited by a sol-gel method were about 35 nm and 450 nm, respectively. From the electrical properties of the LZO film on Si, no hysteresis was observed in the C-V curve and the leakage current density was about 1.4 × 10 -7 A/cm 2 at 5 V. SBT film on the LZO/Si structure was crystallized in a polycrystalline phase with a highly preferred (115) orientation. The C-V characteristics of Au/SBT/LZO/Si structure showed a clockwise hysteresis loop and the memory window width increased as the bias voltage increased. The fabricated Fe-FETs showed typical n-channel MFIS-FETs C-V characteristics and the current on/off ratio was about 10 3 . Also, the memory window width was about 0.7 V.

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The effect of ZrO2 buffer layer on electrical properties in Pt/SrBi2Ta2O9/ZrO2/Si ferroelectric gate oxide structure

Cited by 39 publications

References 7 publications

Surface morphology control of zirconia thin films prepared using novel photochromic molecules

Surface morphology control of zirconia thin films prepared using novel photochromic molecules

Integration of Ferroelectric Materials: An Ultimate Solution for Next-Generation Computing and Storage Devices

Characteristics of Au/SBT/LZO/Si MFIS structure for ferroelectric-gate field-effect transistors

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