Metal-ferroelectric-insulator-semiconductor (MFIS) diodes and p-channel MFIS field-effect transistors (FETs) were fabricated and their electrical properties were characterized. These MFIS structures were formed using HfO 2 as an insulating buffer layer, and SrBi 2 Ta 2 O 9 (SBT) and (Bi,La) 4 Ti 3 O 12 (BLT) as ferroelectric films. HfO 2 buffer layers of about 8 nm physical thickness were deposited by ultrahigh-vacuum (UHV) electron-beam evaporation, then ferroelectric films of about 400 nm thickness were deposited by sol-gel spin coating. The fabricated p-channel MFIS-FETs with the SBT/HfO 2 gate structure exhibited a drain current on/off ratio larger than 10 3 even after 30 days had elapsed. It was also found that the degradation of ferroelectricity was not pronounced even after applying 2:2 Â 10 11 bipolar pulses.
Electrical properties of the p-channel metal-ferroelectric-insulator-silicon field-effect transistors (MFISFETs) using Pt∕SrBi2Ta2O9(SBT)∕HfO2∕Si and Pt∕(Bi,La)4Ti3O12(BLT)∕HfO2∕Si gate structures were investigated. Sol-gel-derived 400-nm-thick SBT and BLT films were deposited on an HfO2 film of approximately 10 nm in thickness. The channel width and channel length of the fabricated MFISFETs were 50 and 5 μm, respectively. The significant drain current on∕off ratios were retained for over 10 days at room temperature. The fabricated MFISFETs using a Pt∕SBT∕HfO2∕Si gate structure exhibited a drain current on∕off ratio of about 105 even after 15.9 days had elapsed. It was also found in the fabricated MFISFETs that a write pulse width as short as 20 ns was enough for obtaining the significant drain current on∕off ratio. It is concluded from these results that HfO2 is one of the best buffer layer materials for realizing MFISFETs with long data retention and high operation speed.
Lanthanum aluminate (LaAlO3) films were deposited on Si(100) substrates by evaporating single-crystal pellets in vacuum using an electron-beam gun. Then, they were annealed in N2 ambience at 700 °C for 10 min using an electric furnace. X-ray diffraction analysis showed that the LaAlO3 films were amorphous even after the annealing process. No hysteretic characteristics were observed in the capacitance–voltage (C–V) measurement and the dielectric constant of the LaAlO3 films was estimated to be 21–25. It was also found that the leakage current density decreased by about three orders of magnitude after the annealing process. On these films, Sr0.8Bi2.2Ta2O9 films with 210 nm thickness were deposited by a sol–gel method. All samples annealed in O2 atmosphere at temperatures ranging from 650 to 750 °C showed hysteretic C–V characteristics, and the memory window width in the sample annealed at 750 °C for 30 min was about 3.0 V for a voltage sweep of ±10 V. It was also found that the capacitance values biased in the hysteresis loop were unchanged over 12 h.
In order to form metal–ferroelectric–semiconductor–insulator–semiconductor (MFIS) structures, hafnium oxide (HfO2) films were first deposited on Si(100) substrates at room temperature using an electron-beam evaporation method. Then, they were annealed in an O2 atmosphere at 800°C for 1min. No hysteretic characteristics were observed in the capacitance–voltage (C–V) measurement for the metal–insulator–semiconductor capacitors. On these films, lanthanum-substituted bismuth titanate [(Bi,La)4Ti3O12:BLT] films with 380nm in thickness were deposited by a sol–gel spin-coating method and annealed in an O2 atmosphere at 750°C for 30min. The MFIS sample showed the hysteretic C–V characteristics and the memory window width was about 0.9V for the voltage sweep of ±7V. Furthermore, the high and low capacitance values biased in the hysteresis loop were clearly distinguishable for over 5 days. The origin of the excellent data retention characteristics is discussed from a viewpoint of the transient current across the film.
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